Wolfgang Nebel
Affiliations:- University of Oldenburg, Germany
According to our database1,
Wolfgang Nebel
authored at least 173 papers
between 1985 and 2023.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2012, "For contributions to the design of low-power circuits and systems".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on id.loc.gov
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on d-nb.info
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on isni.org
On csauthors.net:
Bibliography
2023
Proceedings of the 21st IEEE International Conference on Industrial Informatics, 2023
2022
A Detailed Analysis of Timing Effects in an IEC 61499 Ethernet/TSN Communication Scenario.
Proceedings of the 27th IEEE International Conference on Emerging Technologies and Factory Automation, 2022
2021
Legacy software migration based on timing contract aware real-time execution environments.
J. Syst. Softw., 2021
2020
Microprocess. Microsystems, 2020
A Timed-Value Stream Based ESL Timing and Power Estimation and Simulation Framework for Heterogeneous MPSoCs.
Int. J. Parallel Program., 2020
Work-in-Progress: Modeling of real-time communication for industrial distributed automation systems.
Proceedings of the 16th IEEE International Conference on Factory Communication Systems, 2020
Proceedings of the RAPIDO 2020 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2020
Proceedings of the 25th IEEE International Conference on Emerging Technologies and Factory Automation, 2020
Proceedings of the 2020 International Conference on Omni-layer Intelligent Systems, 2020
2019
Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Experimental Evaluation of Scenario Aware Synchronous Data Flow based Power Management.
Proceedings of the International Conference on Omni-Layer Intelligent Systems, 2019
2018
An Integration Flow for Mixed-Critical Embedded Systems on a Flexible Time-Triggered Platform.
ACM Trans. Design Autom. Electr. Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Proceedings of the 7th International Conference on Smart Cities and Green ICT Systems, 2018
Towards power management verification of time-triggered systems using virtual platforms.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
Real-Time Capable Retargeting of Xilinx MicroBlaze Binaries using QEMU: A Feasibility Study.
Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018
Proceedings of MODELS 2018 Workshops: ModComp, 2018
Functional Test Environment for Time-Triggered Control Systems in Complex MPSoCs Using GALI.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
2017
Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication.
Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2017
User dependent aging prediction model for automotive controllers with power electronics.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
Timing modeling at RT-level by separation of design- and stress related aging impacts.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
A Functional Test Framework to Observe MPSoC Power Management Techniques in Virtual Platforms.
Proceedings of the Euromicro Conference on Digital System Design, 2017
2016
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
A quasi-cycle accurate timing model for binary translation based instruction set simulators.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Predicting Performance and Energy Efficiency for Large-Scale Parallel Applications on Highly Heterogeneous Platforms.
Proceedings of the 19th GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Embedded tutorial: Analog-/mixed-signal verification methods for AMS coverage analysis.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015
Ein Verfahren zur Bestimmung eines Powermodells von Xilinx MicroBlaze MPSoCs zur Verwendung in Virtuellen Plattformen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2015
Proceedings of the System Level Design from HW/SW to Memory for Embedded Systems, 2015
Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2015
Proceedings of the 2015 Forum on Specification and Design Languages, 2015
Teaching Mixed-Criticality: Multi-Rotor Flight Control and Payload Processing on a Single Chip.
Proceedings of the Workshop on Embedded and Cyber-Physical Systems Education, 2015
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015
2014
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the 2014 Forum on Specification and Design Languages, 2014
Using Early Power and Timing Estimations of Massively Heterogeneous Computation Platforms to Create Optimized HPC Applications.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014
Proceedings of the 28th International Conference on Informatics for Environmental Protection: ICT for Energy Effieciency, 2014
Expansion of Data Center's Energetic Degrees of Freedom to Employ Green Energy Sources.
Proceedings of the 28th International Conference on Informatics for Environmental Protection: ICT for Energy Effieciency, 2014
Proceedings of the Energy Efficient Data Centers - Third International Workshop, 2014
Data-and State-Dependent Power Characterisation and Simulation of Black-Box RTL IP Components at System Level.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
Proceedings of the Cyber Security and Privacy - Third Cyber Security and Privacy EU Forum, 2014
Considering VM migration between IaaS Clouds and mobile Clients: Challenges and Potentials.
Proceedings of the 3rd IEEE International Conference on Cloud Networking, 2014
2013
The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration.
Microprocess. Microsystems, 2013
Proceedings of the 2013 international workshop on Hot topics in cloud services, 2013
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Enabling energy-aware design decisions for behavioural descriptions containing black-box IP-components.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Profilbasierte Energieabschätzung integrierter Schaltungen auf algorithmischer Ebene.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Ansatz zur Bewertung der HW/SW-Kommunikation in asymmetrischen Multi-Prozessor-Systemen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Early Power & Timing Estimation of Custom Hardware Blocks based on Automatically Generated Combinatorial Macros.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Data Center Smart Grid Integration Considering Renewable Energies and Waste Heat Usage.
Proceedings of the Energy-Efficient Data Centers - Second International Workshop, 2013
2012
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
Fast Propagation of Hamming and Signal Distances for Register-Transfer Level Datapaths.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
Proceedings of the International Conference on Energy Aware Computing, 2012
Proceedings of the International Conference on Energy Aware Computing, 2012
Proceedings of the International Conference on Energy Aware Computing, 2012
Transformation of event-driven HDL blocks for native integration into time-driven system models.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
2011
Bus. Inf. Syst. Eng., 2011
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011
Automatische Übersetzung von MATLAB/Simulink-Modellen nach SystemC-AMS.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2011
Proceedings of the 12th Latin American Test Workshop, 2011
Towards Dependability-Aware Design of Hardware Systems Using Extended Program State Machines.
Proceedings of the 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2011
Proceedings of the 2nd International Conference on Energy-Efficient Computing and Networking 2011, 2011
Motion Pattern Generation and Recognition for Mobility Assessments in Domestic Environments.
Proceedings of the AAL 2011, 2011
2010
Towards an ESL Framework for Timing and Power Aware Rapid Prototyping of HW/SW Systems.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
Proceedings of the 1st International Conference on Energy-Efficient Computing and Networking, 2010
Statistical static capacity management in virtualized data centers supporting fine grained QoS specification.
Proceedings of the 1st International Conference on Energy-Efficient Computing and Networking, 2010
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
PolyDyn - Object-Oriented Modelling and Synthesis Targeting Dynamically Reconfigurable FPGAs.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
Prax. Inf.verarb. Kommun., 2009
J. Embed. Comput., 2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the Analysis, 2009
Proceedings of the 39. Jahrestagung der Gesellschaft für Informatik, Im Focus das Leben, INFORMATIK 2009, Lübeck, Germany, September 28, 2009
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
OSSS+R: A framework for application level modelling and synthesis of reconfigurable systems.
Proceedings of the Design, Automation and Test in Europe, 2009
An automated flow for integrating hardware IP into the automotive systems engineering process.
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Effizienzanalyse synthetisierter Hardware-Software-Kommunikation am Beispiel eines hardwarebeschleunigten MPEG-Audio-Dekoders.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2008
Analyse und Optimierung von dynamisch rekonfigurierbaren Systemen mittels Ereignisvisualisierung.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2008
On leakage currents: sources and reduction for transistors, gates, memories and digital systems.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the Languages for Embedded Systems and their Applications, 2008
Proceedings of the Forum on specification and Design Languages, 2008
Proceedings of the Languages for Embedded Systems and their Applications, 2008
Efficient Modelling and Simulation of Embedded Software Multi-Tasking using SystemC and OSSS.
Proceedings of the Forum on specification and Design Languages, 2008
Proceedings of the Forum on specification and Design Languages, 2008
Proceedings of the Forum on specification and Design Languages, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Exploration, Partitioning and Simulation of Reconfigurable Systems (Exploration, Partitionierung und Simulation rekonfigurierbarer Systeme).
it Inf. Technol., 2007
Modelling the Impact of High Level Leakage Optimization Techniques on the Delay of RT-Components.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
Eine Fallstudie zur dynamischen Rekonfiguration von Hardware: "Pain or Gain?".
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Logic design techniques for 65 to 45nm and below for reducing total energy and solving technology variations problems.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.
Proceedings of the FPL 2007, 2007
Proceedings of the Forum on specification and Design Languages, 2007
Early Power-Aware Design & Validation: Myth or Reality?
Proceedings of the 44th Design Automation Conference, 2007
2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Accurate PTV, State, and ABB Aware RTL Blackbox Modeling of Subthreshold, Gate, and PN-Junction Leakage.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Modelling and Synthesis of Communication Using OSSS-Channels.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006
Modelling macromodules for high-level dynamic power estimation of FPGA-based digital designs.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Analysis and modeling of subthreshold leakage of RT-components under PTV and state variation.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the Forum on specification and Design Languages, 2006
2005
A High Level Constant Coefficient Multiplier Power Model for Power Estimation on High Levels of Abstraction.
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the Integrated Circuit and System Design, 2005
Verlustleistungsabschätzung und -optimierung auf hohen Abstraktionsebenen: Modellierung von Funktionskomponenten und Leitungslängenabschätzung.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
Kommunikationsgetriebene Hardware-/Software Partitionierung eines Netzwerkprotokoll-Stacks auf einer SoC Plattform.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
2004
Proceedings of the Integrated Circuit and System Design, 2004
Proceedings of the Design Methods and Applications for Distributed Embedded Systems, 2004
Proceedings of the Forum on specification and Design Languages, 2004
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
Proceedings of the 2004 Design, 2004
Predictable design of low power systems by pre-implementation estimation and optimization.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Proceedings of the Integrated Circuit and System Design, 2003
Erweiterung der UML um Zeitannotationen zur Analyse des Zeitverhaltens reaktiver Systeme.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
Informationstechnik Tech. Inform., 2002
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
2001
Estimation of lower and upper bounds on the power consumption from scheduled data flow graphs.
IEEE Trans. Very Large Scale Integr. Syst., 2001
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Reliable Software Technologies: Ada Europe 2001, 2001
2000
Inform. Forsch. Entwickl., 2000
Proceedings of the Integrated Circuit Design, 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
Lower Bounds on the Power Consumption in Scheduled Data Flow Graphs with Resource Constraints.
Proceedings of the 2000 Design, 2000
1999
OOCOSIM - objektorientierte Spezifikation und Simulation eingebetteter Realzeitsysteme.
Informationstechnik Tech. Inform., 1999
Proceedings of the «UML»'99: The Unified Modeling Language, 1999
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
Auditory Signal Processing in Hardware: A Linear Gammatone Filterbank Design for a Model of the Auditory System.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999
Implementing a Quantitative Model for the "Effective" Signal Processing in the Auditory System on a Dedicated Digital VLSI Hardware.
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Proceedings of the 1999 Design, 1999
Proceedings of the 1999 Design, 1999
Proceedings of the 1999 Design, 1999
1998
Informationstechnik Tech. Inform., 1998
Übersetzung von Objektorientiertem VHDL nach Standard VHDL.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the Reliable Software Technologies, 1998
1996
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Proceedings of the conference on European design automation, 1996
Proceedings of the conference on European design automation, 1996
1995
Proceedings of the Proceedings EURO-DAC'95, 1995
1992
VHDL for high speed desktop video ICs: experience with replacement of other simulator.
Proceedings of the conference on European design automation, 1992
1988
Microprocess. Microprogramming, 1988
1986
REX, automatic extraction of RT-level descriptions from integrated circuit layout data.
PhD thesis, 1986
1985
CAD-Entwurfskontrolle in der Mikorelektronik - mit einer Einführung in den Entwurf kundenspezifischer Schaltkreise.
Leitfäden der angewandten Informatik, Teubner, ISBN: 978-3-519-02476-7, 1985