Wolfgang Fichtner
Affiliations:- ETH Zurich, Switzerland
According to our database1,
Wolfgang Fichtner
authored at least 131 papers
between 1982 and 2012.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1990, "For the application of numerical modeling to device scaling and submicron transistor optimization.".
Timeline
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Bibliography
2012
Electro-thermal simulation in the time domain of GaN HEMT for RF switch-mode amplifier.
Microelectron. Reliab., 2012
2011
Synthesis of scanning electron microscopy images by high performance computing for the metrology of advanced CMOS processes.
Microelectron. Reliab., 2011
Design of optimum electron beam irradiation processes for the reliability of electric cables used in critical applications.
Microelectron. Reliab., 2011
A New Built-In Defect-Based Testing Technique to Achieve Zero Defects in the Automotive Environment.
J. Electron. Test., 2011
Atomistic nanoelectronic device engineering with sustained performances up to 1.44 PFlop/s.
Proceedings of the Conference on High Performance Computing Networking, 2011
2010
IEEE Trans. Instrum. Meas., 2010
Accurate extraction of the mechanical properties of thin films by nanoindentation for the design of reliable MEMS.
Microelectron. Reliab., 2010
A new built-in screening methodology for Successive Approximation Register Analog to Digital Converters.
Microelectron. Reliab., 2010
Modeling secondary electron images for linewidth measurement by critical dimension scanning electron microscopy.
Microelectron. Reliab., 2010
Novel built-in methodology for defect testing of capacitor oxide in SAR analog to digital converters for critical automotive applications.
Proceedings of the 15th European Test Symposium, 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
IEEE Trans. Instrum. Meas., 2009
A new built-in screening methodology to achieve zero defects in the automotive environment.
Microelectron. Reliab., 2009
Multiscale simulation of aluminum thin films for the design of highly-reliable MEMS devices.
Microelectron. Reliab., 2009
Ensuring the reliability of electron beam crosslinked electric cables by the optimization of the dose depth distribution with Monte Carlo simulation.
Microelectron. Reliab., 2009
Microelectron. J., 2009
Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Novel Solution for the Built-in Gate Oxide Stress Test of LDMOS in Integrated Circuits for Automotive Applications.
Proceedings of the 14th IEEE European Test Symposium, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers.
IEEE Trans. Very Large Scale Integr. Syst., 2008
Proceedings of the Third ACM Workshop on Wireless Network Testbeds, 2008
FPGA implementation of a 2G fibre channel link encryptor with authenticated encryption mode GCM.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Hardware-efficient steering matrix computation architecture for MIMO communication systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the Euro-Par 2008, 2008
Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
IEEE Trans. Biomed. Eng., 2007
Microelectron. Reliab., 2007
A study of the threshold-voltage suitability as an application-related reliability indicator for planar-gate non-punch-through IGBTs.
Microelectron. Reliab., 2007
Measurement of the transient junction temperature in MOSFET devices under operating conditions.
Microelectron. Reliab., 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
Proceedings of the 15th European Signal Processing Conference, 2007
A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
Moments of the Inverse Scattering Operator of the Boltzmann Equation: Theory and Applications.
SIAM J. Appl. Math., 2006
Compact modelling and analysis of power-sharing unbalances in IGBT-modules used in traction applications.
Microelectron. Reliab., 2006
Microelectron. Reliab., 2006
New technique for the measurement of the static and of the transient junction temperature in IGBT devices under operating conditions.
Microelectron. Reliab., 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
42% power savings through glitch-reducing clocking strategy in a hearing aid application.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
Proceedings of the 14th European Signal Processing Conference, 2006
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm.
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006
2005
Assessment of the Analytical Capabilities of Scanning Capacitance and Scanning Spreading Resistance Microscopy Applied to Semiconductor Devices.
Microelectron. Reliab., 2005
Extraction of Accurate Thermal Compact Models for Fast Electro-Thermal Simulation of IGBT Modules in Hybrid Electric Vehicles.
Microelectron. Reliab., 2005
Two-dimensional Dopant Profiling and Imaging of 4H Silicon Carbide Devices by Secondary Electron Potential Contrast.
Microelectron. Reliab., 2005
IEEE J. Solid State Circuits, 2005
Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC.
Proceedings of the Second Workshop on Globally Asynchronous, Locally Synchronous Design, 2005
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
A 0.67-mm<sup>2</sup> 45-μW DSP VLSI implementation of an adaptive directional microphone for hearing aids.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005
2004
Characterization of self-heating effects in semiconductor resistors during transmission line pulses.
Microelectron. Reliab., 2004
On the Use of Neural Networks to Solve the Reverse Modelling Problem for the Quantification of Dopant Profiles Extracted by Scanning Probe Microscopy Techniques.
Microelectron. Reliab., 2004
2D Dopant Profiling on 4H Silicon Carbide P<sup>+</sup>N Junction by Scanning Capacitance and Scanning Electron Microscopy.
Microelectron. Reliab., 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
2003
IEEE Trans. Signal Process., 2003
A New Procedure to Define the Zero-Field Condition and to Delineate pn-Junctions in Silicon Devices by Scanning Capacitance Microscopy.
Microelectron. Reliab., 2003
On the behaviour of the selective iodine-based gold etch for the failure analysis of aged optoelectronic devices.
Microelectron. Reliab., 2003
Math. Comput. Simul., 2003
Inf. Syst. E Bus. Manag., 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
A 50 Mbps 4×4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003
2002
Comparison of Single-Particle Monte Carlo Simulation with Measured Output Characteristics of an 0.1µm n-MOSFET.
VLSI Design, 2002
Simulation and Experimental Validation of Scanning Capacitance Microscopy Measurements across Low-doped Epitaxial PN-Junction.
Microelectron. Reliab., 2002
Device Simulation and Backside Laser Interferometry--Powerful Tools for ESD Protection Development.
Microelectron. Reliab., 2002
A Novel Thermomechanics -Based Lifetime Prediction Model for Cycle Fatigue Failure Mechanisms in Power Semiconductors.
Microelectron. Reliab., 2002
Proceedings of the Cryptographic Hardware and Embedded Systems, 2002
Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002
2001
VLSI Design, 2001
Microelectron. Reliab., 2001
Substrate potential shift due to parasitic minority carrier injection in smart-power ICs: measurements and full-chip 3D device simulation.
Microelectron. Reliab., 2001
Advanced 2D/3D ESD device simulation - a powerful tool already used in a pre-Si phase.
Microelectron. Reliab., 2001
PARDISO: a high-performance serial and parallel sparse linear solver in semiconductor device simulation.
Future Gener. Comput. Syst., 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
IEEE J. Solid State Circuits, 2000
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000
1999
Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
Application of Parallel Sparse Direct Methods in Semiconductor Device and Process Simulation.
Proceedings of the High Performance Computing, Second International Symposium, 1999
Scalable Parallel Sparse Factorization with Left-Right Looking Strategy on Shared Memory Multoprocessors.
Proceedings of the High-Performance Computing and Networking, 7th International Conference, 1999
1998
Statistical Enhancement of Terminal Current Estimation for Monte Carlo Device Simulation.
VLSI Design, 1998
Self-Consistent Calculations of the Ground State and the Capacitance of a 3D Si/SiO<sub>2</sub> Quantum Dot.
VLSI Design, 1998
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE J. Solid State Circuits, 1997
1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
1995
Solving Large Sparse Linear Systems in a Distributed Computing Environment.
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, 1995
1994
IEEE J. Solid State Circuits, March, 1994
1993
Mixed element trees: a generalization of modified octrees for the generation of meshes for the simulation of complex 3-D semiconductor device structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993
1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
A Set of New Mapping and Coloring Heuristics for Distributed-Memory Parallel Processors.
SIAM J. Sci. Comput., 1992
Generation of 3-D Delaunay Meshes for Complex Geometries using Iterative Refinement.
Proceedings of the Algorithms, Software, Architecture, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
1991
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
Omega-an octree-based mixed element grid allocator for the simulation of complex 3-D device structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
Proceedings of the Proceedings Supercomputing '91, 1991
Proceedings of the conference on European design automation, 1991
1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989
1988
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988
1986
Proceedings of the Embedded Systems: New Approaches to Their Formal Description and Design, 1986
1985
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985
IEEE Des. Test, 1985
1982
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1982