Wojciech Sulek

Orcid: 0000-0003-3462-0657

According to our database1, Wojciech Sulek authored at least 13 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Chaos-Encryption-Based Secure Polar Coding for Network-Oriented Cloud Control System.
IEEE Trans. Ind. Informatics, March, 2024

2019
Protograph Based Low-Density Parity-Check Codes Design With Mixed Integer Linear Programming.
IEEE Access, 2019

Virtual Oversampling of Sparse Channel Impulse Response.
Proceedings of the Computer Networks - 26th International Conference, 2019

2016
Nonbinary Quasi-Regular QC-LDPC Codes Derived From Cycle Codes.
IEEE Commun. Lett., 2016

Non-binary LDPC Decoders Design for Maximizing Throughput of an FPGA Implementation.
Circuits Syst. Signal Process., 2016

2015
Message Quantization Scheme for Nonbinary LDPC Decoder FPGA Implementation.
J. Commun., 2015

Column weights optimization for semi-regular nonbinary LDPC codes.
Proceedings of the 38th International Conference on Telecommunications and Signal Processing, 2015

2013
Subchannel ordering scheme for LDPC-coded OFDM transmission over selective channels.
Proceedings of the 36th International Conference on Telecommunications and Signal Processing, 2013

OFDM Transmission with Non-binary LDPC Coding in Wireless Networks.
Proceedings of the Computer Networks, 20th International Conference, 2013

GF(q) LDPC decoder design for FPGA implementation.
Proceedings of the 10th IEEE Consumer Communications and Networking Conference, 2013

2012
On the Overflow Problem in Finite Precision Turbo Decoding Message Passing.
IEEE Trans. Commun., 2012

2010
Banyan switch applied for LDPC decoder FPGA implementation.
Proceedings of the 10th IFAC Workshop on Programmable Devices and Embedded Systems, 2010

2009
Seed graph expansion for construction of structured LDPC codes.
Proceedings of the 2009 6th International Symposium on Wireless Communication Systems, 2009


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