Wladyslaw Szczesniak

According to our database1, Wladyslaw Szczesniak authored at least 6 papers between 1996 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2007
Selecting the Optimal Number of Functional Units of Digital Real Time Systems.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

2003
Reducing average and peak temperatures of VLSI CMOS circuits by means of evolutionary algorithm applied to high level synthesis.
Microelectron. J., 2003

2002
Application of adaptive circuit partitioning algorithm to reduction of interconnections length between elements of VLSI circuit.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Application of adaptive evolutionary algorithm for low power design of CMOS digital circuits.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

1999
Evolutionary algorithm for electronic systems partitioning and its applications in VLSI design.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1996
Multifunctional VLSI systems and their simulation.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996


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