Winston Haaswijk

Orcid: 0000-0003-3784-5771

According to our database1, Winston Haaswijk authored at least 16 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
One-pass Synthesis for Field-coupled Nanocomputing Technologies.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
Mapping Monotone Boolean Functions into Majority.
IEEE Trans. Computers, 2019

Logic Optimization of Majority-Inverter Graphs.
Proceedings of the 22nd Workshop Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2019

Exact Synthesis of Boolean Functions in Majority-of-Five Forms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

On-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Scalable Generic Logic Synthesis: One Approach to Rule Them All.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
The EPFL Logic Synthesis Libraries.
CoRR, 2018

Deep Learning for Logic Optimization Algorithms.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Integrated ESOP Refactoring for Industrial Designs.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Practical exact synthesis.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

SAT based exact synthesis using DAG topology families.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Classifying Functions with Exact Synthesis.
Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

A novel basis for logic rewriting.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Multi-level logic benchmarks: An exactness study.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2015
NEM relay design with biconditional binary decision diagrams.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015


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