Wilson-Javier Pérez-Holguín

Affiliations:
  • Universidad Pedagógica y Tecnológica de Colombia, Sogamoso, Colombia
  • Universidad del Valle, Cali, Colombia


According to our database1, Wilson-Javier Pérez-Holguín authored at least 12 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Analyzing the Reliability of Stream Sparse Matrix-Vector Multiplication Accelerators: A High-Level Approach.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024

An Integrated Environment for the Reliability Assessment of CNNs Accelerators Implemented in FPGAs.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024

2021
Partitioned Reconstruction of Contact Forces in Tactile Sensor Arrays for Robotic Sensing Systems.
Proceedings of the 2nd International Conference on Robotics, 2021

2019
Exploiting Approximate Computing to Increase System Lifetime.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

2012
Software-Based Testing for System Peripherals.
J. Electron. Test., 2012

2011
Functional Verification of DMA Controllers.
J. Electron. Test., 2011

Functional test generation for the pLRU replacement mechanism of embedded cache memories.
Proceedings of the 12th Latin American Test Workshop, 2011

2010
Functional test generation for DMA controllers.
Proceedings of the 11th Latin American Test Workshop, 2010

A software-based self-test methodology for system peripherals.
Proceedings of the 15th European Test Symposium, 2010

2009
On the Generation of Functional Test Programs for the Cache Replacement Logic.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008
A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs.
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008

Software-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008


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