William Tuohy

According to our database, William Tuohy authored at least 9 papers between 2009 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Impact of spintronic memory on multicore cache hierarchy design.

Cong Ma, William Tuohy, David J. Lilja

IET Comput. Digit. Tech., 2017

2014

Improving Energy and Performance with Spintronics Caches in Multicore Systems.

William Tuohy, Cong Ma, Pushkar Nandkar, Nishant Borse, David J. Lilja

Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014

2012

A Technique for Test Coverage Closure Using GoldMine.

Lingyi Liu, David Sheridan, William Tuohy, Shobha Vasudevan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

2011

Cohesion: An Adaptive Hybrid Memory Model for Accelerators.

John H. Kelm, Daniel R. Johnson, William Tuohy, Steven S. Lumetta, Sanjay J. Patel

IEEE Micro, 2011

Rigel: A 1, 024-Core Single-Chip Accelerator Architecture.

Daniel R. Johnson, Matthew R. Johnson, John H. Kelm, William Tuohy, Steven S. Lumetta, Sanjay J. Patel

IEEE Micro, 2011

Towards coverage closure: Using GoldMine assertions for generating design validation stimulus.

Lingyi Liu, David Sheridan, William Tuohy, Shobha Vasudevan

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Cohesion: a hybrid memory model for accelerators.

John H. Kelm, Daniel R. Johnson, William Tuohy, Steven S. Lumetta, Sanjay J. Patel

Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

GoldMine: Automatic assertion generation using data mining and static analysis.

Shobha Vasudevan, David Sheridan, Sanjay J. Patel, David Tcheng, William Tuohy, Daniel R. Johnson

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Rigel: an architecture and scalable programming interface for a 1000-core accelerator.

John H. Kelm, Daniel R. Johnson, Matthew R. Johnson, Neal Clayton Crago, William Tuohy, Aqeel Mahesri, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009