William Swartz

According to our database, William Swartz authored at least 15 papers between 1990 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Science Target Prioritization Framework for Remote Sensing.

Vinay Ravindra, Douglas Caldwell, Meghan Chandarana Saephan, Bryan Duncan, Sarah Strode, William Swartz, Kristen Manies, Jeremy Frank, Richard Levinson, Eugene Turkov

Proceedings of the IGARSS 2024, 2024

2020

CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric.

Mustafa M. Shihab, Bharath Ramanidharan, Gaurav Rajavendra Reddy, Jingxiang Tian, William Swartz, Carl Sechen, Yiorgos Makris

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA.

Bo Hu, Jingxiang Tian, Mustafa M. Shihab, Gaurav Rajavendra Reddy, William Swartz, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming.

Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz, Benjamin Carrión Schäfer, Carl Sechen, Yiorgos Makris

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project.

Tutu Ajayi, Vidya A. Chhabria, Mateus Fogaça, Soheil Hashemi, Abdelrahman Hosny, Andrew B. Kahng, Minsoo Kim, Jeongsup Lee, Uday Mallappa, Marina Neseem, Geraldo Pradipta, Sherief Reda, Mehdi Saligane, Sachin S. Sapatnekar, Carl Sechen, Mohamed Shalan, William Swartz, Lutong Wang, Zhehong Wang, Mingyu Woo, Bangqi Xu

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2017

A field programmable transistor array featuring single-cycle partial/full dynamic reconfiguration.

Jingxiang Tian, Gaurav Rajavendra Reddy, Jiajia Wang, William Swartz, Yiorgos Makris, Carl Sechen

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

A fast force-directed simulated annealing for 3D IC partitioning.

Aysa Fakheri Tabrizi, Laleh Behjat, William Swartz, Logan M. Rakai

Integr., 2016

2015

A Detailed Routing-Aware Detailed Placement Technique.

Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan M. Rakai, Andrew A. Kennings, William Swartz, Laleh Behjat

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

2012

Analysis of post-placement length estimation.

William Swartz, Yang-Yang Li, Amin Farshidi, Laleh Behjat

Proceedings of the International Workshop on System Level Interconnect Prediction, 2012

2008

Placement Using Simulated Annealing.

William Swartz

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

Issues in global routing.

William Swartz

Proceedings of the 2008 International Symposium on Physical Design, 2008

2004

Efficient timing closure without timing driven placement and routing.

Miodrag Vujkovic, David Wadkins, William Swartz, Carl Sechen

Proceedings of the 41th Design Automation Conference, 2004

1995

Timing Driven Placement for Large Standard Cell Circuits.

William Swartz, Carl Sechen

Proceedings of the 32st Conference on Design Automation, 1995

1993

A new generalized row-based global router.

William Swartz, Carl Sechen

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1990

New Algorithms for the Placement and Routing of Macro Cells.

William Swartz, Carl Sechen

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990