William R. Patterson
According to our database1,
William R. Patterson
authored at least 22 papers
between 2004 and 2022.
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Bibliography
2022
CoRR, 2022
A new deep neural segmentation network for cerebral aneurysms in 2D digital subtraction angiography.
Proceedings of the Medical Imaging 2022: Image-Guided Procedures, 2022
2018
A Sub-Threshold Noise Transient Simulator Based on Integrated Random Telegraph and Thermal Noise Modeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
A Simulation Framework for Analyzing Transient Effects Due to Thermal Noise in Sub-Threshold Circuits.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
2013
A 100-Channel Hermetically Sealed Implantable Device for Chronic Wireless Neurosensing Applications.
IEEE Trans. Biomed. Circuits Syst., 2013
2012
A 100-channel hermetically sealed implantable device for wireless neurosensing applications.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012
2011
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011
A 32-channel fully implantable wireless neurosensor for simultaneous recording from two cortical regions.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011
2010
Listening to Brain Microcircuits for Interfacing With External World - Progress in Wireless Implantable Microelectronic Neuroengineering Devices.
Proc. IEEE, 2010
Numerical queue solution of thermal noise-induced soft errors in subthreshold CMOS devices.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
2007
J. Electron. Test., 2007
Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007
Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
IEEE Micro, 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
A microelectrode/microelectronic hybrid device for brain implantable neuroprosthesis applications.
IEEE Trans. Biomed. Eng., 2004