William H. Joyner

According to our database1, William H. Joyner authored at least 6 papers between 1984 and 2014.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 1998, "For contributions to the development of practical automated logic synthesis and its application to high-performance VLSI designs.".

Timeline

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Links

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Bibliography

2014
The Design Automation Conference and the Early Days of EDA.
IEEE Des. Test, 2014

2010
EDA challenges and options: investing for the future.
Proceedings of the 47th Design Automation Conference, 2010

2009
Moore's Law: another casualty of the financial meltdown?
Proceedings of the 46th Design Automation Conference, 2009

2008
Custom is from Venus and synthesis from Mars.
Proceedings of the 45th Design Automation Conference, 2008

2003
Panel: What's the next 'big thing' in simulation-based verification?
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

1984
Design synthesis in VLSI and software engineering.
J. Syst. Softw., 1984


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