William E. Dougherty

According to our database, William E. Dougherty authored at least 8 papers between 1998 and 2005.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2005

Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems.

Nagu R. Dhanwada, Reinaldo A. Bergamaschi, William W. Dungan, Indira Nair, Paul Gramann, William E. Dougherty, Ing-Chao Lin

Des. Autom. Embed. Syst., 2005

2003

Measurements for structural logic synthesis optimizations.

Prabhakar Kudva, Andrew Sullivan, William E. Dougherty

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

SEAS: a system for early analysis of SoCs.

Reinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal

Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

2002

Metrics for Structural Logic Synthesis.

Prabhakar Kudva, Andrew Sullivan, William E. Dougherty

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

2000

Unifying behavioral synthesis and physical design.

William E. Dougherty, Donald E. Thomas

Proceedings of the 37th Conference on Design Automation, 2000

1999

Subsetting Behavioral Intellectual Property for Low Power ASIP Design.

William E. Dougherty, David J. Pursley, Donald E. Thomas

J. VLSI Signal Process., 1999

Modeling and automating selection of guarding techniques for datapath elements.

William E. Dougherty, Donald E. Thomas

Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

1998

Using regression analysis for GA-based ATPG parameter optimization.

William E. Dougherty, R. D. (Shawn) Blanton

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998