William C. Carter

According to our database1, William C. Carter authored at least 27 papers between 1954 and 2002.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2002
Detecting measurement bias in respondent reports of personal networks.
Soc. Networks, 2002

1989
Hardware and Software Dependability Evaluation: System Dependability.
Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989

1984
Implementation and Evaluation of a (<i>b, k</i>)-Adjacent Error-Correcting/Detecting Scheme for Supercomputer Systems.
IBM J. Res. Dev., 1984

1982
Book reviews.
Comput. Humanit., 1982

Signature Testing with Guaranteed Bounds for Fault Coverage.
Proceedings of the Proceedings International Test Conference 1982, 1982

1981
Reliability, Availability, and Serviceability of IBM Computer Systems: A Quarter Century of Progress.
IBM J. Res. Dev., 1981

1979
Symbolic simulation for correct machine design.
Proceedings of the 16th Design Automation Conference, 1979

1978
Using Machine Descriptions in Program Verification.
Proceedings of the Information Technology '78: Proceedings of the 3rd Jerusalem Conference on Information Technology (JCIT3), 1978

Microprogram verification considered necessary.
Proceedings of the American Federation of Information Processing Societies: 1978 National Computer Conference, 1978

1976
Implementation of an Experimental Fault-Tolerant Memory System.
IEEE Trans. Computers, 1976

Automated proofs of microprogram correctness.
Proceedings of the 9th annual workshop on Microprogramming, 1976

1974
Some Techniques for Microprogram Validation.
Proceedings of the Information Processing, 1974

1973
Lookaside Techniques for Minimum Circuit Memory Translators.
IEEE Trans. Computers, 1973

Fault-Tolerant Computing: An Introduction and a Viewpoint.
IEEE Trans. Computers, 1973

Modeling of a Bubble-Memory Organization with Self-Checking Translators to Achieve High Reliability.
IEEE Trans. Computers, 1973

1971
Logic Design for Dynamic and Interactive Recovery.
IEEE Trans. Computers, 1971

A Simple Self-Testing Decoder Checking Circuit.
IEEE Trans. Computers, 1971

Reliability Modeling for Fault-Tolerant Computers.
IEEE Trans. Computers, 1971

A Survey of Fault Tolerant Computer Architecture and its Evaluation.
Computer, 1971

1969
Reliability modeling techniques for self-repairing computer systems.
Proceedings of the 24th national conference, 1969

1968
Design of dynamically checked computers.
Proceedings of the Information Processing, Proceedings of IFIP Congress 1968, Edinburgh, UK, 5-10 August 1968, Volume 2, 1968

1965
The controls automation system
Proceedings of the 6th Annual Symposium on Switching Circuit Theory and Logical Design, 1965

1964
Design of Serviceability Features for the IBM System/360.
IBM J. Res. Dev., 1964

1962
Mathematical Analysis of Merge-Sorting Techniques.
Proceedings of the Information Processing, Proceedings of the 2nd IFIP Congress 1962, Munich, Germany, August 27, 1962

1959
New merge sorting techniques.
Proceedings of the Preprints of papers presented at the 14th national meeting of the Association for Computing Machinery, 1959

1954
A Comparison of Order Structures for Automatic Digital Computers.
Oper. Res., 1954

Redundancy checking for small digital computers.
Proceedings of the 1954 eastern joint computer conference: Design and application of small digital computers, 1954


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