William Burchanowski

According to our database, William Burchanowski authored at least 2 papers between 2005 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2006

An Accelerated Jitter Tolerance Test Technique on Ate for 1.5GB/S and 3GB/S Serial-ATA.

Yongquan Fan, Yi Cai, Liming Fang, Anant Verma, William Burchanowski, Zeljko Zilic, Sandeep Kumar

Proceedings of the 2006 IEEE International Test Conference, 2006

2005

A comprehensive production test solution for 1.5Gb/s and 3Gb/s serial-ATA - based on AWG and undersampling techniques.

Yi Cai, Amit Bhattacharyya, Joe Martone, Anant Verma, William Burchanowski

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005