Wilhelmus A. M. Van Noije
Orcid: 0000-0002-9010-3083
According to our database1,
Wilhelmus A. M. Van Noije
authored at least 65 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Variable Conversion Approach for Design Optimization of Low-Voltage Low-Pass Filters.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024
2023
Biomed. Signal Process. Control., 2023
Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023
2022
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
2021
Experimental evaluation of a Software-Defined Radio through a Breast Phantom aiming at Microwave Medical Imaging.
Microprocess. Microsystems, November, 2021
An Optimized Radiation Tolerant Baseline Correction Filter for HEP Using AI Methodologies.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Proceedings of the 34th IEEE International System-on-Chip Conference, 2021
Assessment of key parameters in a microwave imaging system design for breast cancer detection.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
ISFET Array Readout System with Integrated 12 bit A/D Conversion for Lab-on-Chip Applications.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
2020
IEEE Trans. Instrum. Meas., 2020
All-digital FPGA-based RF pulsed transmitter with hardware complexity reduction techniques.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
A 10.75-ENOB 20 MS/s SAR ADC for an UWB Transceiver Applied in Breast Cancer Detection in 180 nm CMOS.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
A Radiation Tolerant Baseline Correction Filter for Front-ends in High Energy Physics Experiments.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
Proceedings of the 32nd International Conference on Microelectronics, 2020
Proceedings of the 13th International Congress on Image and Signal Processing, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
2018
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 19th IEEE Latin-American Test Symposium, 2018
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
A 3.9 compression-ratio Huffman encoding scheme for the large ion collider on 65nm and 130nm CMOS technologies.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016
2015
High Stability Voltage Controlled Current Source for Cervical Cancer Detection using Electrical Impedance Spectroscopy.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
Configurable low noise readout front-end for gaseous detectors in 130nm CMOS technology.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2013
Synthesis of a narrow-band Low Noise Amplifier in a 180 nm CMOS technology using Simulated Annealing with crossover operator.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013
Analysis of the effects of coupling through substrate and the calculus of the Q factor.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
Inductorless very small 2<sup>nd</sup> derivative Gaussian IRUWB transmitter module using n/p-latches as PDs in CMOS technology.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013
2012
An Optimization-Based Reconfigurable Design for a 6-Bit 11-MHz Parallel Pipeline ADC with Double-Sampling S&H.
Int. J. Reconfigurable Comput., 2012
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012
2011
Analog design synthesis method using simulated annealing and particle swarm optimization.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
Time-interleaved pipeline ADC design: a reconfigurable approach supported by optimization.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
2010
Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010
2009
Comparison of small cross inductors and rectangular inductors designed in 0.35um CMOS technology.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009
2008
An improved and automated design tool for the optimization of CMOS OTAs using geometric programming.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
2007
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007
A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
2003
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003
2002
Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design.
IEEE Trans. Very Large Scale Integr. Syst., 2002
2001
Implementação de Um Sistema de Decriptografia para Controle Bancário em Hardware tipo FPGA.
RITA, 2001
2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
The Use of Extended TSPC CMOS Structures to Build Circuits with Doubled Input/Output Data Throughput.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000
Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000
1999
A 1.6-GHz dual modulus prescaler using the extended true-single-phase-clock CMOS circuit technique (E-TSPC).
IEEE J. Solid State Circuits, 1999
1998
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998
1997
Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997
1995
IEEE J. Solid State Circuits, May, 1995
1994
A sampling technique and its CMOS implementation with 1 Gb/s bandwidth and 25 ps resolution.
IEEE J. Solid State Circuits, March, 1994