Wieslaw Kuzmicz

Orcid: 0000-0001-5201-2503

According to our database1, Wieslaw Kuzmicz authored at least 26 papers between 1986 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
A Simple Ultra-Low Power Opamp in 22 nm FDSOI.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

2017
The future of CMOS: More Moore or the next big thing?
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

A low power input amplifier for bio-signal acquisition in 28 nm FDSOI technology.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016
MOS transistor as a current-controlled device.
Proceedings of the 2016 MIXDES, 2016

Extension of the corner stitching data structure for arbitrary layout shapes.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2014
Fuzzy logic-based diagnostic algorithm for implantable cardioverter defibrillators.
Artif. Intell. Medicine, 2014

2013
A compact model of VES-BJT device.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

2011
Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2008
Hierarchical Analysis of Short Defects between Metal Lines in CMOS IC.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007
AnaDig-An Educational Chip for VLSI Device Characterization.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2005
DOT: new deterministic defect-oriented ATPG tool.
Proceedings of the 10th European Test Symposium, 2005

Defect-Oriented Test- and Layout-Generation for Standard-Cell ASIC Designs.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004
Fuzzy logic controller for rate-adaptive heart pacemaker.
Appl. Soft Comput., 2004

2002
Hierarchical test generation for combinational circuits with real defects coverage.
Microelectron. Reliab., 2002

Integrated Design and Test Generation Under Internet Based Environment MOSCITO.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

CMOS Standard Cells Characterization for IDDQ Testing.
Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

2001
Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement.
Microelectron. Reliab., 2001

Defect-Oriented Fault Simulation and Test Generation in Digital Circuits.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

CMOS Standard Cells Characterization for Defect Based Testing.
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

2000
Internet-Based Virtual Manufacturing: A Verification Tool for IC Designs.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

Hierarchical defect-oriented fault simulation for digital circuits.
Proceedings of the 5th European Test Workshop, 2000

Graphical user interface of FIESTA - software for faults identification and estimation of testability of VLSI circuits.
Proceedings of the Symposium on Contemporary Computing in Ukraine, 2000

1997
Extension of Inductive Fault Analysis to Parametric Faults in Analog Circuits with Application to Test Generation.
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

1996
Architecture of a testable analog fuzzy logic controller.
IEEE Trans. Fuzzy Syst., 1996

1995
SENSAT-a practical tool for estimation of the IC layout sensitivity to spot defects.
Proceedings of the 1995 European Design and Test Conference, 1995

1986
Modeling of Minority Carrier Current in Heavily Doped Regions of Bipolar Regions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986


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