Widianto

According to our database, Widianto authored at least 2 papers between 2011 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A Built-in Test Circuit for Electrical Interconnect Testing of Open Defects in Assembled PCBs.

Widianto, Masaki Hashizume, Shohei Suenaga, Hiroyuki Yotsuyanagi, Akira Ono, Shyue-Kung Lu, Zvi Roth

IEICE Trans. Inf. Syst., 2016

2011

A built-in test circuit for open defects at interconnects between dies in 3D ICs.

Widianto, Hiroyuki Yotsuyanagi, Akira Ono, Masao Takagi, Masaki Hashizume

Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011