Werner Geurts

According to our database, Werner Geurts authored at least 15 papers between 1991 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces.

Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Werner Geurts, Gert Goossens, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini

Future Gener. Comput. Syst., 2015

2013

A heterogeneous many-core platform for experiments on scalable custom interconnects and management of fault and critical events, applied to many-process applications: Vol. II, 2012 technical report.

Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Werner Geurts, Gert Goossens, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini

CoRR, 2013

2006

Design of ASIPs in multi-processor SoCs using the Chess/Checkers retargetable tool suite.

Gert Goossens, Dirk Lanneer, Werner Geurts, Johan Van Praet

Proceedings of the International Symposium on System-on-Chip, 2006

2001

Processor modeling and code selection for retargetable compilation.

Johan Van Praet, Dirk Lanneer, Werner Geurts, Gert Goossens

ACM Trans. Design Autom. Electr. Syst., 2001

Solving large scale assignment problems in high-level synthesis by approximative quadratic programming.

Florin Balasa, Werner Geurts, Francky Catthoor, Hugo De Man

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

1997

Embedded software in real-time signal processing systems: design technologies.

Gert Goossens, Johan Van Praet, Dirk Lanneer, Werner Geurts, Augusli Kifli, Clifford Liem, Pierre G. Paulin

Proc. IEEE, 1997

1996

A Graph Based Processor Model for Retargetable Code Generation.

Johan Van Praet, Dirk Lanneer, Gert Goossens, Werner Geurts, Hugo De Man

Proceedings of the 1996 European Design and Test Conference, 1996

1995

Quadratic zero-one programming-based synthesis of application-specific data paths.

Werner Geurts, Francky Catthoor, Hugo De Man

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1994

Optimal Scheduling and Software Pipelining of Repetitive Signal Flow Graphs with Delay Line Optimization.

Francis Depuydt, Werner Geurts, Gert Goossens, Hugo De Man

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Chess: retargetable code generation for embedded DSP processors.

Dirk Lanneer, Johan Van Praet, Augusli Kifli, Koen Schoofs, Werner Geurts, Filip Thoen, Gert Goossens

Proceedings of the Code Generation for Embedded Processors [Dagstuhl Workshop, Dagstuhl, Germany, August 31, 1994

Loop transformation methodology for fixed-rate video, image and telecom processing applications.

Francky Catthoor, Werner Geurts, Hugo De Man

Proceedings of the International Conference on Application Specific Array Processors, 1994

1993

Testability analysis in high level data path synthesis.

Johannes Steensma, Werner Geurts, Francky Catthoor, Hugo De Man

J. Electron. Test., 1993

1992

Time Constrained Allocation and Assignment Techniques for High Throughput Signal Processing.

Werner Geurts, Francky Catthoor, Hugo De Man

Proceedings of the 29th Design Automation Conference, 1992

1991

Partitioning-Based Allocation of Dedicated Data-Paths in the Architectural Synthesis for High Throughput Applications.

Werner Geurts, Stefaan Note, Francky Catthoor, Hugo De Man

Proceedings of the VLSI 91, 1991

Cathedral-III: Architecture-Driven High-level Synthesis for High Throughput DSP Applications.

Stefaan Note, Werner Geurts, Francky Catthoor, Hugo De Man

Proceedings of the 28th Design Automation Conference, 1991