Wenji Fang

According to our database, Wenji Fang authored at least 13 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2025

Transferable Presynthesis PPA Estimation for RTL Designs With Data Augmentation Techniques.

Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, Zhiyao Xie

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2025

Towards Big Data in AI for EDA Research: Generation of New Pseudo Circuits at RTL Stage.

Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, Zhiyao Xie

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

A Self-Supervised, Pre-Trained, and Cross-Stage-Aligned Circuit Encoder Provides a Foundation for Various Design Tasks.

Wenji Fang, Shang Liu, Hongce Zhang, Zhiyao Xie

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs.

Zhiyuan Yan, Wenji Fang, Mengming Li, Min Li, Shang Liu, Zhiyao Xie, Hongce Zhang

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

TTNN: A Physically Guided Deep Learning Model for Focal Depth and Epicenter Distance Estimation Based on Multistation Waveforms.

Duofa Ji, Wenji Fang, Changhai Zhai, Zelin Cao, Yuhong Ma

IEEE Trans. Geosci. Remote. Sens., 2024

The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models.

Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F. Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou

CoRR, 2024

AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs.

Wenji Fang, Mengming Li, Min Li, Zhiyuan Yan, Shang Liu, Hongce Zhang, Zhiyao Xie

CoRR, 2024

SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model.

Mengming Li, Wenji Fang, Qijun Zhang, Zhiyao Xie

CoRR, 2024

Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.

Wenji Fang, Shang Liu, Hongce Zhang, Zhiyao Xie

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

r-map: Relating Implementation and Specification in Hardware Refinement Checking.

Wenji Fang, Guangyu Hu, Hongce Zhang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution.

Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, Hongce Zhang, Zhiyao Xie

CoRR, 2023

WASIM: A Word-level Abstract Symbolic Simulation Framework for Hardware Formal Verification.

Wenji Fang, Hongce Zhang

Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2023

MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design.

Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, Zhiyao Xie

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023