Weizeng Li

According to our database1, Weizeng Li authored at least 6 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Write-Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024

First Demonstration of Monolithic Three-Dimensional Integration of Ultra-High Density Hybrid IGZO/Si SRAM and IGZO 2T0C DRAM Achieving Record-Low Latency (5000s).
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A 2T P-Channel Logic Flash Cell for Reconfigurable Interconnection in Chiplet-Based Computing-In-Memory Accelerators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference.
IEEE J. Solid State Circuits, October, 2023

2022
RRAM Computing-in-Memory Using Transient Charge Transferring for Low-Power and Small-Latency AI Edge Inference.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022


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