Weize Yu
Orcid: 0000-0002-8720-3083
According to our database1,
Weize Yu
authored at least 37 papers
between 2015 and 2024.
Collaborative distances:
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Bibliography
2024
Int. J. Circuit Theory Appl., August, 2024
IEEE Trans. Very Large Scale Integr. Syst., June, 2024
Neural Networks, 2024
A low-overhead and high-reliability physical unclonable function (PUF) for cryptography.
Integr., 2024
2023
Int. J. Circuit Theory Appl., December, 2023
A novel on-chip linear and switching mixed regulation against power analysis attacks.
Integr., November, 2023
A machine learning low-dropout regulator-assisted differential power analysis attack countermeasure with voltage scaling.
Int. J. Circuit Theory Appl., July, 2023
J. Circuits Syst. Comput., February, 2023
A sequential strong PUF architecture based on reconfigurable neural networks (RNNs) against state-of-the-art modeling attacks.
Integr., 2023
Int. J. Circuit Theory Appl., 2023
A low output ripple and high security on-chip voltage regulation based on Fourier transform.
Int. J. Circuit Theory Appl., 2023
2022
Convex optimization of random dynamic voltage and frequency scaling against power attacks.
Integr., 2022
2021
An efficient methodology for hardware Trojan detection based on canonical correlation analysis.
Microelectron. J., 2021
Integr., 2021
IEEE Embed. Syst. Lett., 2021
2020
Optimization of Combined Power and Modeling Attacks on VR PUFs With Lagrange Multipliers.
IEEE Trans. Circuits Syst., 2020
Proceedings of the 21st International Conference on Information Reuse and Integration for Data Science, 2020
2019
IET Circuits Devices Syst., 2019
Leveraging Balanced Logic Gates as Strong PUFs for Securing IoT Against Malicious Attacks.
J. Electron. Test., 2019
Proceedings of the 21st ACM/IEEE International Workshop on System Level Interconnect Prediction, 2019
Proceedings of the 28th IEEE North Atlantic Test Workshop, 2019
Convolutional Neural Networks (CNNs)-Assisted Voltage Regulation: A New Power Delivery Scheme.
Proceedings of the 28th IEEE North Atlantic Test Workshop, 2019
2018
IEEE Trans. Emerg. Top. Comput., 2018
Exploiting Multi-Phase On-Chip Voltage Regulators as Strong PUF Primitives for Securing IoT.
J. Electron. Test., 2018
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
2017
Exploiting On-Chip Voltage Regulators as a Countermeasure Against Power Analysis Attacks.
PhD thesis, 2017
Security-Adaptive Voltage Conversion as a Lightweight Countermeasure Against LPA Attacks.
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
False Key-Controlled Aggressive Voltage Scaling: A Countermeasure Against LPA Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Implications of noise insertion mechanisms of different countermeasures against side-channel attacks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the Hardware and Architectural Support for Security and Privacy, 2017
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017
2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Charge-Withheld Converter-Reshuffling: A Countermeasure Against Power Analysis Attacks.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
2015
Time-Delayed Converter-Reshuffling: An Efficient and Secure Power Delivery Architecture.
IEEE Embed. Syst. Lett., 2015
Leveraging on-chip voltage regulators as a countermeasure against side-channel attacks.
Proceedings of the 52nd Annual Design Automation Conference, 2015