Weiwen Jiang
Orcid: 0000-0002-9004-487X
According to our database1,
Weiwen Jiang
authored at least 131 papers
between 2013 and 2024.
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Online presence:
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Bibliography
2024
A Self-guided Multimodal Approach to Enhancing Graph Representation Learning for Alzheimer's Diseases.
CoRR, 2024
PQML: Enabling the Predictive Reproducibility on NISQ Machines for Quantum ML Applications.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2024
Towards a Quantum Algorithm for the Incompressible Nonlinear Navier-Stokes Equations.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2024
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2024
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2024, 2024
Data-Algorithm-Architecture Co-Optimization for Fair Neural Networks on Skin Lesion Dataset.
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2024, 2024
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2024, 2024
PristiQ: A Co-Design Framework for Preserving Data Security of Quantum Learning in the Cloud.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Proceedings of the 15th ACM/IEEE International Conference on Cyber-Physical Systems, 2024
QUAPPROX: A Framework for Benchmarking the Approximability of Variational Quantum Circuit.
Proceedings of the IEEE International Conference on Acoustics, 2024
GPU Partitioning & Neural Architecture Sizing for Safety-Driven Sensing in Autonomous Systems.
Proceedings of the International Conference on Assured Autonomy, 2024
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Proceedings of the 2024 Conference on Empirical Methods in Natural Language Processing, 2024
QuGeo: An End-to-end Quantum Learning Framework for Geoscience - A Case Study on Full-Waveform Inversion.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Tutorial on Novel Toolkits toward AI for Science on Resource-Constrained Computing Systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2024
2023
Comput. Graph. Forum, June, 2023
IEEE Trans. Vis. Comput. Graph., 2023
CoRR, 2023
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023
Towards Redefining the Reproducibility in Quantum Computing: A Data Analysis Approach on NISQ Devices.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023
A Novel Spatial-Temporal Variational Quantum Circuit to Enable Deep Learning on NISQ Devices.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023
Toward Consistent High-Fidelity Quantum Learning on Unstable Devices via Efficient In-Situ Calibration.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023
Proceedings of the 14th International Green and Sustainable Computing Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Muffin: A Framework Toward Multi-Dimension AI Fairness by Uniting Off-the-Shelf Models.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Battle Against Fluctuating Quantum Noise: Compression-Aided Framework to Enable Robust Quantum Neural Network.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
Quantization through Search: A Novel Scheme to Quantize Convolutional Neural Networks in Finite Weight Space.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2022
J. Imaging, December, 2022
Mobile or FPGA? A Comprehensive Evaluation on Energy Efficiency and a Unified Optimization Framework.
ACM Trans. Embed. Comput. Syst., September, 2022
CoRR, 2022
A Collaboration Strategy in the Mining Pool for Proof-of-Neural-Architecture Consensus.
CoRR, 2022
CoRR, 2022
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2022
Hardware-aware Automated Architecture Search for Brain-inspired Hyperdimensional Computing.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Proceedings of the IEEE International Performance, 2022
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
On the Design of Quantum Graph Convolutional Neural Network in the NISQ-Era and Beyond.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
All-in-One: A Highly Representative DNN Pruning Framework for Edge Devices with Dynamic Power Management.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
A length adaptive algorithm-hardware co-design of transformer on FPGA through sparse attention and dynamic pipelining.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
RADARS: Memory Efficient Reinforcement Learning Aided Differentiable Neural Architecture Search.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
On the Design of Minimal-Cost Pipeline Systems Satisfying Hard/Soft Real-Time Constraints.
IEEE Trans. Emerg. Top. Comput., 2021
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators.
IEEE Trans. Computers, 2021
Contour: A Process Variation Aware Wear-Leveling Mechanism for Inodes of Persistent Memory File Systems.
IEEE Trans. Computers, 2021
Proc. ACM Meas. Anal. Comput. Syst., 2021
Optimizing FPGA-based Accelerator Design for Large-Scale Molecular Similarity Search.
CoRR, 2021
CoRR, 2021
Can Noise on Qubits Be Learned in Quantum Neural Network? A Case Study on QuantumFlow.
CoRR, 2021
Work in Progress: Mobile or FPGA? A Comprehensive Evaluation on Energy Efficiency and a Unified Optimization Framework.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021
Accelerating Transformer-based Deep Learning Models on FPGAs using Column Balanced Block Pruning.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the Thirtieth International Joint Conference on Artificial Intelligence, 2021
RMSMP: A Novel Deep Neural Network Quantization Framework with Row-wise Mixed Schemes and Multiple Precisions.
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021
Exploration of Quantum Neural Architecture by Mixing Quantum Neuron Designs: (Invited Paper).
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Optimizing FPGA-based Accelerator Design for Large-Scale Molecular Similarity Search (Special Session Paper).
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
FL-DISCO: Federated Generative Adversarial Network for Graph-based Molecule Drug Discovery: Special Session Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Can Noise on Qubits Be Learned in Quantum Neural Network? A Case Study on QuantumFlow (Invited Paper).
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE International Conference on Blockchain and Cryptocurrency, 2021
Dancing along Battery: Enabling Transformer with Run-time Reconfigurability on Mobile Devices.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Privacy-Preserving Medical Image Segmentation via Hybrid Trusted Execution Environment.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search With Hot Start.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Towards the design of efficient hash-based indexing scheme for growing databases on non-volatile memory.
Future Gener. Comput. Syst., 2020
MSP: An FPGA-Specific Mixed-Scheme, Multi-Precision Deep Neural Network Quantization Framework.
CoRR, 2020
Achieving Real-Time Execution of Transformer-based Large-scale Models on Mobile with Compiler-aware Neural Architecture Optimization.
CoRR, 2020
Can Quantum Computers Learn Like Classical Computers? A Co-Design Framework for Machine Learning and Quantum Circuits.
CoRR, 2020
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2020, 2020
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2020, 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
Towards Cardiac Intervention Assistance: Hardware-aware Neural Architecture Exploration for Real-Time 3D Cardiac Cine MRI Segmentation.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the ECAI 2020 - 24th European Conference on Artificial Intelligence, 29 August-8 September 2020, Santiago de Compostela, Spain, August 29 - September 8, 2020, 2020
Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
ACM Trans. Embed. Comput. Syst., 2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
CoRR, 2019
When Neural Architecture Search Meets Hardware Implementation: from Hardware Awareness to Co-Design.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
XFER: A Novel Design to Achieve Super-Linear Performance on Multiple FPGAs for Real-Time AI.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019
Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Towards the Design of Efficient and Consistent Index Structure with Minimal Write Activities for Non-Volatile Memory.
IEEE Trans. Computers, 2018
Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip.
IEEE Trans. Computers, 2018
J. Syst. Archit., 2018
Synthesizing distributed pipelining systems with timing constraints via optimal functional unit assignment and communication selection.
J. Comput. Sci., 2018
On the Design of Reliable Heterogeneous Systems via Checkpoint Placement and Core Assignment.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Optimal Functional-Unit Assignment for Heterogeneous Systems Under Timing Constraint.
IEEE Trans. Parallel Distributed Syst., 2017
FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era.
IEEE Trans. Parallel Distributed Syst., 2017
Future Gener. Comput. Syst., 2017
Future Gener. Comput. Syst., 2017
Efficient assignment algorithms to minimize operation cost for supply chain networks in agile manufacturing.
Comput. Ind. Eng., 2017
Towards the design of optimal range assignment for elevator groups under fluctuant traffic loads.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017
Optimal functional unit assignment and voltage selection for pipelined MPSoC with guaranteed probability on time performance.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017
2016
Properties of Self-Timed Ring Architectures for Deadlock-Free and Consistent Configuration Reaching Maximum Throughput.
J. Signal Process. Syst., 2016
Application Mapping and Scheduling for Network-on-Chip-Based Multiprocessor System-on-Chip With Fine-Grain Communication Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Efficient Data Placement for Improving Data Access Performance on Domain-Wall Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Computers, 2016
A unified framework for designing high performance in-memory and hybrid memory file systems.
J. Syst. Archit., 2016
Proceedings of the 17th International Conference on Parallel and Distributed Computing, 2016
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016
Optimizing Data Placement of MapReduce on Ceph-Based Framework under Load-Balancing Constraint.
Proceedings of the 22nd IEEE International Conference on Parallel and Distributed Systems, 2016
Optimal Functional Assignment and Communication Selection under Timing Constraint for Self-Timed Pipelines.
Proceedings of the 13th International Conference on Embedded Software and Systems, 2016
The Design and Implementation of an Efficient Data Consistency Mechanism for In-Memory File Systems.
Proceedings of the 13th International Conference on Embedded Software and Systems, 2016
Proceedings of the 2016 International Conference on Embedded Software, 2016
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016
Proceedings of the International Conference on Advanced Cloud and Big Data, 2016
FoToNoC: A hierarchical management strategy based on folded lorus-like Network-on-Chip for dark silicon many-core systems.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015
Proceedings of the Algorithms and Architectures for Parallel Processing, 2015
Traffic-Aware Application Mapping for Network-on-Chip Based Multiprocessor System-on-Chip.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
On the Design of High-Performance and Energy-Efficient Probabilistic Self-Timed Systems.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
2014
Contention-aware task and communication co-scheduling for network-on-chip based Multiprocessor System-on-Chip.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014
An Improved Thermal Model for Static Optimization of Application Mapping and Scheduling in Multiprocessor System-on-Chip.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
2013
Effective file data-block placement for different types of page cache on hybrid main memory architectures.
Des. Autom. Embed. Syst., 2013