Weitong Chuang

According to our database1, Weitong Chuang authored at least 8 papers between 1992 and 2000.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2000
Power-delay optimizations in gate sizing.
ACM Trans. Design Autom. Electr. Syst., 2000

1995
Circuit-level dictionaries of CMOS bridging faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Timing and area optimization for standard-cell VLSI circuit design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Power vs. delay in gate sizing: conflicting objectives?
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994
Delay and area optimization for compact placement by gate resizing and relocation.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Fast Mixed-Mode Simulation for Accurate MOS Bridging Fault Detection.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

A unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992
Estimating rotation speed from projections in SAR.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992


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