Weiliang Peng
According to our database1,
Weiliang Peng
authored at least 2 papers
in 2024.
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Bibliography
2024
A 10-kHz BW 104.3-dB DR discrete-time delta-sigma modulator with ring-amplifier-based integrator.
Microelectron. J., February, 2024
A 2-2 MASH ΔΣ ADC with fast-charge CLS input buffer and dual double sampling achieving 103.3-dB SNDR and ±2.5-ppm/FSR INL.
Microelectron. J., February, 2024