Weikang Qian

Integr., 2020

Accurate and Energy-Efficient Implementation of Non-Linear Adder in Parallel Stochastic Computing using Sorting Network.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Exploring Target Function Approximation for Stochastic Circuit Minimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Optimally Approximated and Unbiased Floating-Point Multiplier with Runtime Configurability.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Reliability-Enhanced Circuit Design Flow Based on Approximate Logic Synthesis.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Accuracy Analysis for Stochastic Circuits with D Flip-Flop Insertion.

[BibT_eX]

[DOI]

Kuncai Zhong

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

When Sorting Network Meets Parallel Bitstreams: A Fault-Tolerant Parallel Ternary Neural Network Accelerator based on Stochastic Computing.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Go Unary: A Novel Synapse Coding and Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set.

[BibT_eX]

[DOI]

Chang Meng

Alan Mishchenko

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

A Reconfigurable Approximate Multiplier for Quantized CNN Applications.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Energy-Efficient Nonvolatile SRAM Design Based on Resistive Switching Multi-Level Cells.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Simultaneous Area and Latency Optimization for Stochastic Circuits by D Flip-Flop Insertion.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

An Efficient Method for Calculating the Error Statistics of Block-Based Approximate Adders.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

A high-accuracy approximate adder with correct sign calculation.

[BibT_eX]

[DOI]

Integr., 2019

A Data Structure-Based Approximate Belief Propagation Decoder for Polar Codes.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

A Survey of Computation-Driven Data Encoding.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

Area-Efficient Parallel Stochastic Computing with Shared Weighted Binary Generator.

[BibT_eX]

[DOI]

Lun Zhang

Hai-Bao Chen

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

Variation-Aware Global Placement for Improving Timing-Yield of Carbon-Nanotube Field Effect Transistor Circuit.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2018

A Graphical Model of Smoking-Induced Global Instability in Lung Cancer.

[BibT_eX]

[DOI]

Yanbo Wang

Bo Yuan

IEEE ACM Trans. Comput. Biol. Bioinform., 2018

Stochastic Circuit Synthesis by Cube Assignment.

[BibT_eX]

[DOI]

Xuesong Peng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

The Promise and Challenge of Stochastic Computing.

[BibT_eX]

[DOI]

Armin Alaghi

John P. Hayes

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Tier-Code: An XOR-Based RAID-6 Code with Improved Write and Degraded-Mode Read Performance.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Conference on Networking, 2018

Towards Theoretical Cost Limit of Stochastic Number Generators for Stochastic Computing.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Optimizing Stochastic Computing-Based FIR Filters.

[BibT_eX]

[DOI]

Kuncai Zhong

Meng Yang

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

DALS: delay-driven approximate logic synthesis.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

Approximate Belief Propagation Decoder for Polar Codes.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

Efficient batch statistical error estimation for iterative multi-level approximate logic synthesis.

[BibT_eX]

[DOI]

Sanbao Su

Proceedings of the 55th Annual Design Automation Conference, 2018

A Branch-and-Bound-Based Minterm Assignment Algorithm for Synthesizing Stochastic Circuit.

[BibT_eX]

[DOI]

Xuesong Peng

Proceedings of the Advanced Logic Synthesis, 2018

2017

A Reconfigurable Architecture with Sequential Logic-Based Stochastic Computing.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2017

An Accurate and Efficient Method to Calculate the Error Statistics of Block-based Approximate Adders.

[BibT_eX]

[DOI]

CoRR, 2017

Approximate Disjoint Bi-Decomposition and Its Application to Approximate Logic Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Design of accurate stochastic number generators with noisy emerging devices for stochastic computing.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Approximate logic synthesis for FPGA by wire removal and local function change.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

A Learning Algorithm for Bayesian Networks and Its Efficient Implementation on GPUs.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2016

Accelerating stochastic computation for binary classification applications.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

A General Sign Bit Error Correction Scheme for Approximate Adders.

[BibT_eX]

[DOI]

Rui Zhou

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Parallelizing FPGA Technology Mapping through Partitioning.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

An efficient method for multi-level approximate logic synthesis under error rate constraint.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Synthesizing cubes to satisfy a given intersection pattern.

[BibT_eX]

[DOI]

Ivo G. Rosenberg

Discret. Appl. Math., 2015

Timing-driven placement for carbon nanotube circuits.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

On microarchitectural modeling for CNFET-based circuits.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Minimizing Error of Stochastic Computation through Linear Transformation.

[BibT_eX]

[DOI]

Chen Wang

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

A general design of stochastic circuit and its synthesis.

[BibT_eX]

[DOI]

Zheng Zhao

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A new approximate adder with low relative error and correct sign calculation.

[BibT_eX]

[DOI]

Junjun Hu

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

DPALS: A dynamic programming-based algorithm for two-level approximate logic synthesis.

[BibT_eX]

[DOI]

Chen Zou

Jie Han

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

Computation on Stochastic Bit Streams Digital Image Processing Case Studies.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

Logical Computation on Stochastic Bit Streams with Linear Finite-State Machines.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

BDD-based synthesis of reconfigurable single-electron transistor arrays.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Generating multiple correlated probabilities for MUX-based stochastic computing architecture.

[BibT_eX]

[DOI]

Yili Ding

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

2013

Research of the Precision Clock Synchronization Based on IEEE 1588.

[BibT_eX]

[DOI]

Chao Guo

Junhui Mei

J. Softw., 2013

An ultra-fast parallel architecture using sequential circuits computing on random bits.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Optimizing multi-level combinational circuits for generating random bits.

[BibT_eX]

[DOI]

Chen Wang

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

A Novel Learning Algorithm for Bayesian Network and Its Efficient Implementation on GPU

[BibT_eX]

[DOI]

CoRR, 2012

Case Studies of Logical Computation on Stochastic Bit Streams.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012

A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic.

[BibT_eX]

[DOI]

Peng Li

David J. Lilja

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

An efficient implementation of numerical integration using logical computation on stochastic bit streams.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

The synthesis of linear Finite State Machine-based Stochastic Computational Elements.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Transforming Probabilities With Combinational Logic.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

An Architecture for Fault-Tolerant Computation with Stochastic Logic.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2011

Uniform approximation and Bernstein polynomials with coefficients in the unit interval.

[BibT_eX]

[DOI]

Ivo G. Rosenberg

Eur. J. Comb., 2011

2009

The Synthesis of Stochastic Circuits for Nanoscale Computation.

[BibT_eX]

[DOI]

John D. Backes

Int. J. Nanotechnol. Mol. Comput., 2009

The synthesis of combinational logic to generate probabilities.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

A reconfigurable stochastic architecture for highly reliable computing.

[BibT_eX]

[DOI]

Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2008

The synthesis of robust polynomial arithmetic with stochastic logic.

[BibT_eX]

[DOI]