Weijia Che
According to our database1,
Weijia Che
authored at least 10 papers
between 2010 and 2013.
Collaborative distances:
Collaborative distances:
Timeline
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2012
2013
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2013
Scheduling of synchronous data flow models onto scratchpad memory-based embedded processors.
ACM Trans. Embed. Comput. Syst., 2013
2012
PhD thesis, 2012
System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
2011
Proceedings of the 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2011
Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming.
Proceedings of the 48th Design Automation Conference, 2011
2010
Scheduling of synchronous data flow models on scratchpad memory based embedded processors.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Compilation of stream programs for multicore processors that incorporate scratchpad memories.
Proceedings of the Design, Automation and Test in Europe, 2010
Design of an Automatic Target Recognition algorithm on the IBM Cell Broadband Engine.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010