Weier Wan
Orcid: 0000-0003-3507-9014
According to our database1,
Weier Wan
authored at least 7 papers
between 2016 and 2025.
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Timeline
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Bibliography
2025
PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro With In Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout.
IEEE J. Solid State Circuits, January, 2025
2022
2021
Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory.
CoRR, 2021
2020
33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
A 1.52 pJ/Spike Reconfigurable Multimodal Integrate-and-Fire Neuron Array Transceiver.
Proceedings of the International Conference on Neuromorphic Systems, 2020
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016