Weichen Liu
Orcid: 0000-0002-8576-6130
According to our database1,
Weichen Liu
authored at least 183 papers
between 2007 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Domino-Pro-Max: Toward Efficient Network Simplification and Reparameterization for Embedded Hardware Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024
Introduction to Special Issue on In/Near Memory and Storage Computing for Embedded Systems.
ACM Trans. Embed. Comput. Syst., November, 2024
EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems.
IEEE Embed. Syst. Lett., June, 2024
ACM Trans. Archit. Code Optim., March, 2024
Automated Optical Accelerator Search Toward Superior Acceleration Efficiency, Inference Robustness, and Development Speed.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024
The Psychological Mechanism of Moral Leadership Influencing Responsible Subordinate Behavior.
Syst., 2024
Efficient Deep Learning Infrastructures for Embedded Computing Systems: A Comprehensive Survey and Future Envision.
CoRR, 2024
Enabling Energy-Efficient Deployment of Large Language Models on Memristor Crossbar: A Synergy of Large and Small.
CoRR, 2024
FedTR: Federated Learning Framework with Transfer Learning for Industrial Visual Inspection.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Double-Win NAS: Towards Deep-to-Shallow Transformable Neural Architecture Search for Intelligent Embedded Systems.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Pearls Hide Behind Linearity: Simplifying Deep Convolutional Networks for Embedded Hardware Systems via Linearity Grafting.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
Efficient FPGA-Based Sparse Matrix-Vector Multiplication With Data Reuse-Aware Compression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
An Efficient Gustavson-Based Sparse Matrix-Matrix Multiplication Accelerator on Embedded FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
EdgeCompress: Coupling Multidimensional Model Compression and Dynamic Inference for EdgeAI.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
Automated Optical Accelerator Search: Expediting Green and Ubiquitous DNN-Powered Intelligence.
IEEE Des. Test, December, 2023
IEEE Des. Test, December, 2023
CRIMP: Compact & Reliable DNN Inference on In-Memory Processing via Crossbar-Aligned Compression and Non-ideality Adaptation.
ACM Trans. Embed. Comput. Syst., October, 2023
LightNAS: On Lightweight and Scalable Neural Architecture Search for Embedded Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2023
Latency-constrained DNN architecture learning for edge systems using zerorized batch normalization.
Future Gener. Comput. Syst., May, 2023
SurgeNAS: A Comprehensive Surgery on Hardware-Aware Differentiable Neural Architecture Search.
IEEE Trans. Computers, April, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2023
Proceedings of the 29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2023
iMAT: Energy-Efficient In-Memory Acceleration for Ternary Neural Networks With Sparse Dot Product.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
An Efficient Sparse LSTM Accelerator on Embedded FPGAs with Bandwidth-Oriented Pruning.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023
Accelerating Gustavson-based SpMM on Embedded FPGAs with Element-wise Parallelism and Access Pattern-aware Caches.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
FIONA: Fine-grained Incoherent Optical DNN Accelerator Search for Superior Efficiency and Robustness.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Towards Efficient Convolutional Neural Network for Embedded Hardware via Multi-Dimensional Pruning.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the International Conference on Computers, 2023
Crossbar-Aligned & Integer-Only Neural Network Compression for Efficient in-Memory Acceleration.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
MUGNoC: A Software-Configured Multicast-Unicast-Gather NoC for Accelerating CNN Dataflows.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2022
TAB: Unified and Optimized Ternary, Binary, and Mixed-precision Neural Network Inference on the Edge.
ACM Trans. Embed. Comput. Syst., September, 2022
IEEE Trans. Cybern., 2022
Locking Protocols for Parallel Real-Time Tasks With Semaphores Under Federated Scheduling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
CARTAD: Compiler-Assisted Reinforcement Learning for Thermal-Aware Task Scheduling and DVFS on Multicores.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Fast and Low Overhead Metadata Operations for NVM-Based File System Using Slotted Paging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Toward Minimum WCRT Bound for DAG Tasks Under Prioritized List Scheduling Algorithms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Trans. Computers, 2022
Evolutionary game-based incentive models for sustainable trust enhancement in a blockchained shared manufacturing network.
Adv. Eng. Informatics, 2022
The Virtual-Augmented Reality Simulator: Evaluating OST-HMD AR calibration algorithms in VR.
Proceedings of the 2022 IEEE Conference on Virtual Reality and 3D User Interfaces Abstracts and Workshops, 2022
Proceedings of the Advances in Visual Computing - 17th International Symposium, 2022
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Smart Scissor: Coupling Spatial Redundancy Reduction and CNN Compression for Embedded Hardware.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
You only search once: on lightweight differentiable architecture search for resource-constrained embedded platforms.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Work-in-Progress: What to Expect of Early Training Statistics? An Investigation on Hardware-Aware Neural Architecture Search.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems.
ACM Trans. Embed. Comput. Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Reduced Worst-Case Communication Latency Using Single-Cycle Multihop Traversal Network-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Computers, 2021
IEEE Trans. Computers, 2021
Attack Mitigation of Hardware Trojans for Thermal Sensing via Micro-ring Resonator in Optical NoCs.
ACM J. Emerg. Technol. Comput. Syst., 2021
Partial order based non-preemptive communication scheduling towards real-time networks-on-chip.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021
Optimized Data Reuse via Reordering for Sparse Matrix-Vector Multiplication on FPGAs.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the Big Data and Security - Third International Conference, 2021
Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
HSCoNAS: Hardware-Software Co-Design of Efficient DNNs via Neural Architecture Search.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
IEEE Trans. Parallel Distributed Syst., 2020
Hardware-Software Collaborative Thermal Sensing in Optical Network-on-Chip-based Manycore Systems.
ACM Trans. Embed. Comput. Syst., 2020
Scope-Aware Useful Cache Block Calculation for Cache-Related Pre-Emption Delay Analysis With Set-Associative Data Caches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Disrupted Rich Club Organization of Hemispheric White Matter Networks in Bipolar Disorder.
Frontiers Neuroinformatics, 2020
Evaluation of Low-end Virtual Reality Content of Cultural Heritage: A Preliminary Study with Eye Movement.
Proceedings of the JCDL '20: Proceedings of the ACM/IEEE Joint Conference on Digital Libraries in 2020, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
XOR-Net: An Efficient Computation Pipeline for Binary Neural Network Inference on Edge Devices.
Proceedings of the 26th IEEE International Conference on Parallel and Distributed Systems, 2020
Proceedings of the IEEE International Conference on Multimedia and Expo, 2020
Proceedings of the IEEE International Conference on Multimedia and Expo, 2020
COSMA: An Efficient Concurrency-Oriented Space Management Scheme for In-memory File Systems.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
Load-aware Adaptive Cache Management Scheme for Enterprise-level Stackable Cryptographic File System<sup>*</sup>.
Proceedings of the 22nd IEEE International Conference on High Performance Computing and Communications; 18th IEEE International Conference on Smart City; 6th IEEE International Conference on Data Science and Systems, 2020
Proceedings of the Engineering Reality of Virtual Reality 2020, 2020
LightBulb: A Photonic-Nonvolatile-Memory-based Accelerator for Binarized Convolutional Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 44th IEEE Annual Computers, Software, and Applications Conference, 2020
Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
MindReading: An Ultra-Low-Power Photonic Accelerator for EEG-based Human Intention Recognition.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
IEEE Trans. Parallel Distributed Syst., 2019
IEEE Trans. Parallel Distributed Syst., 2019
ACM Trans. Design Autom. Electr. Syst., 2019
ACM Trans. Embed. Comput. Syst., 2019
Timing-Anomaly Free Dynamic Scheduling of Conditional DAG Tasks on Multi-Core Systems.
ACM Trans. Embed. Comput. Syst., 2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Optimal Application Mapping and Scheduling for Network-on-Chips with Computation in STT-RAM Based Router.
IEEE Trans. Computers, 2019
NV-eCryptfs: Accelerating Enterprise-Level Cryptographic File System with Non-Volatile Memory.
IEEE Trans. Computers, 2019
J. Syst. Archit., 2019
J. Syst. Archit., 2019
J. Exp. Theor. Artif. Intell., 2019
Int. J. Cogn. Informatics Nat. Intell., 2019
Future Gener. Comput. Syst., 2019
Proceedings of the IEEE Real-Time Systems Symposium, 2019
Wear-aware Memory Management Scheme for Balancing Lifetime and Performance of Multiple NVM Slots.
Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
Proceedings of the 2019 IEEE International Conference on Communications, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Routing in optical network-on-chip: minimizing contention with guaranteed thermal reliability.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
ConsensUs: Supporting Multi-Criteria Group Decisions by Visualizing Points of Disagreement.
ACM Trans. Soc. Comput., 2018
A Systematic and Realistic Network-on-Chip Traffic Modeling and Generation Technique for Emerging Many-Core Systems.
IEEE Trans. Multi Scale Comput. Syst., 2018
TripImputor: Real-Time Imputing Taxi Trip Purpose Leveraging Multi-Sourced Urban Data.
IEEE Trans. Intell. Transp. Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip.
IEEE Trans. Computers, 2018
Secur. Commun. Networks, 2018
CoRR, 2018
IEEE Access, 2018
Work-in-Progress: Response Time Bounds for Typed DAG Parallel Tasks on Heterogeneous Multi-cores.
Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018
TaiJiNet: Towards Partial Binarized Convolutional Neural Network for Embedded Systems.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 24th IEEE International Conference on Parallel and Distributed Systems, 2018
User Experience-Enhanced and Energy-Efficient Task Scheduling on Heterogeneous Multi-Core Mobile Systems.
Proceedings of the 24th IEEE International Conference on Parallel and Distributed Systems, 2018
Communication optimization for thermal reliable optical network-on-chip: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018
2017
FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era.
IEEE Trans. Parallel Distributed Syst., 2017
Future Gener. Comput. Syst., 2017
Proceedings of the 2017 IEEE Real-Time Systems Symposium, 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Combining two local searches with crossover: an efficient hybrid algorithm for the traveling salesman problem.
Proceedings of the Genetic and Evolutionary Computation Conference, 2017
Fixed priority scheduling of real-time flows with arbitrary deadlines on smart NoCs: work-in-progress.
Proceedings of the Thirteenth ACM International Conference on Embedded Software 2017 Companion, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
ConsesnsUs: Visualizing Points of Disagreement for Multi-Criteria Collaborative Decision Making.
Proceedings of the 2017 ACM Conference on Computer Supported Cooperative Work and Social Computing, 2017
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017
Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Application Mapping and Scheduling for Network-on-Chip-Based Multiprocessor System-on-Chip With Fine-Grain Communication Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2016
An Efficient Technique of Application Mapping and Scheduling on Real-Time Multiprocessor Systems for Throughput Optimization.
ACM Trans. Embed. Comput. Syst., 2016
J. Circuits Syst. Comput., 2016
Through Global Sharing to Improve Network Efficiency for Radio-Frequency Interconnect Based Network-on-Chip.
IEEE Access, 2016
Hybridizing Different Local Search Algorithms with Each Other and Evolutionary Computation: Better Performance on the Traveling Salesman Problem.
Proceedings of the Genetic and Evolutionary Computation Conference, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
FoToNoC: A hierarchical management strategy based on folded lorus-like Network-on-Chip for dark silicon many-core systems.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Traffic-Aware Application Mapping for Network-on-Chip Based Multiprocessor System-on-Chip.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
An Efficient Technique for Chip Temperature Optimization of Multiprocessor Systems in the Dark Silicon Era.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
User Experience Enhanced Task Scheduling and Processor Frequency Scaling for Energy-Sensitive Mobile Devices.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
<i>n</i>Code: limiting harmful writes to emerging mobile NVRAM through code swapping.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Efficient SAT-based application mapping and scheduling on multiprocessor systems for throughput maximization.
Proceedings of the 2015 International Conference on Compilers, 2015
Proceedings of the Bio-Inspired Computing - Theories and Applications, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
On-chip sensor networks for soft-error tolerant real-time multiprocessor systems-on-chip.
ACM J. Emerg. Technol. Comput. Syst., 2014
Contention-aware task and communication co-scheduling for network-on-chip based Multiprocessor System-on-Chip.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014
An Improved Thermal Model for Static Optimization of Application Mapping and Scheduling in Multiprocessor System-on-Chip.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
A Case Study on the Communication and Computation Behaviors of Real Applications in NoC-Based MPSoCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the 2014 International Conference on Embedded Software, 2014
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
Formal Worst-Case Analysis of Crosstalk Noise in Mesh-Based Optical Networks-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2013
On-Chip Sensor Network for Efficient Management of Power Gating-Induced Power/Ground Noise in Multiprocessor System on Chip.
IEEE Trans. Parallel Distributed Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
2012
A Torus-Based Hierarchical Optical-Electronic Network-on-Chip for Multiprocessor System-on-Chip.
ACM J. Emerg. Technol. Comput. Syst., 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems.
IEEE Trans. Parallel Distributed Syst., 2011
IEEE Embed. Syst. Lett., 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
2010
Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
Proceedings of the 47th Design Automation Conference, 2010
2009
Efficient algorithms for 2D area management and online task placement on runtime reconfigurable FPGAs.
Microprocess. Microsystems, 2009
Efficient Software Synthesis for Dynamic Single Appearance Scheduling of Synchronous Dataflow.
IEEE Embed. Syst. Lett., 2009
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
An efficient technique for analysis of minimal buffer requirements of synchronous dataflow graphs with model checking.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009
Proceedings of the 2009 International Conference on Compilers, 2009
2008
Efficient SAT-Based Mapping and Scheduling of Homogeneous Synchronous Dataflow Graphs for Throughput Optimization.
Proceedings of the 29th IEEE Real-Time Systems Symposium, 2008
2007
An Efficient Algorithm for Online Soft Real-Time Task Placement on Reconfigurable Hardware Devices.
Proceedings of the Tenth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2007), 2007
Improved Schedulability Analysis of EDF Scheduling on Reconfigurable Hardware Devices.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007