Wei Yi Lim

According to our database, Wei Yi Lim authored at least 3 papers between 2014 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

A -121dBm sensitivity, 2μJ/bit Rx, 8.8μJ/bit Tx, narrowband transceiver for ARIB STD and IoT.

M. Kumarasamy Raja, Zhao Bin, Dan Lei Yan, Hongbao Zhang, Wei Yi Lim, Leo John Chemmanda

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016

A 5.1Gb/s 60.3fJ/bit/mm PVT tolerant NoC transceiver.

Vishal Vinayak Kulkarni, Wei Yi Lim, Bin Zhao, Dan Lei Yan, Yu-Shun Wang, Jun Zhou, Muthukumaraswamy Annamalai Arasu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2014

Modeling of two port center-tapped to ground and three port scalable symmetrical inductor.

Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014