Wei Tong

Orcid: 0000-0002-8834-4953

Affiliations:

Huazhong University of Science and Technology, Wuhan National Laboratory for Optoelectronics, China

According to our database¹, Wei Tong authored at least 75 papers between 2007 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2024

Enabling Reliable Memory-Mapped I/O With Auto-Snapshot for Persistent Memory Systems.

[BibT_eX]

[DOI]

IEEE Trans. Computers, September, 2024

CMD: A Cache-assisted GPU Memory Deduplication Architecture.

[BibT_eX]

[DOI]

CoRR, 2024

DRCTL: A Disorder-Resistant Computation Translation Layer Enhancing the Lifetime and Performance of Memristive CIM Architecture.

[BibT_eX]

[DOI]

Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

LpaqHP: A High-Performance FPGA Accelerator for LPAQ Compression.

[BibT_eX]

[DOI]

Proceedings of the 53rd International Conference on Parallel Processing, 2024

A Read Latency Variation Aware Independent Read Scheme for QLC SSDs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

STAGGER: Enabling All-in-One Subarray Sensing for Efficient Module-level Processing in Open-Bitline ReRAM.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

SplitZNS: Towards an Efficient LSM-Tree on Zoned Namespace SSDs.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., September, 2023

A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Turn Waste Into Wealth: Alleviating Read/Write Interference in ZNS SSDs.

[BibT_eX]

[DOI]

Weilin Zhu

Wei Tong

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

Accelerating Persistent Hash Indexes via Reducing Negative Searches.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

LifetimeKV: Narrowing the Lifetime Gap of SSTs in LSMT-based KV Stores for ZNS SSDs.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

ICON: An IR Drop Compensation Method at OU Granularity with Low Overhead for eNVM-based Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

ODLPIM: A Write-Optimized and Long-Lifetime ReRAM-Based Accelerator for Online Deep Learning.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

CorcPUM: Efficient Processing Using Cross-Point Memory via Cooperative Row-Column Access Pipelining and Adaptive Timing Optimization in Subarrays.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

TERMS: Task management policies to achieve high performance for mixed workloads using surplus resources.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2022

Workload-aware storage policies for cloud object storage.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2022

Cora: Data correlations-based storage policies for cloud object storage.

[BibT_eX]

[DOI]

Future Gener. Comput. Syst., 2022

ZNSKV: Reducing Data Migration in LSMT-Based KV Stores on ZNS SSDs.

[BibT_eX]

[DOI]

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

RMMIO: Enabling Reliable Memory-Mapped I/O for Persistent Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

2021

Improving Multilevel Writes on Vertical 3-D Cross-Point Resistive Memory.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Improving Write Performance on Cross-Point RRAM Arrays by Leveraging Multidimensional Non-Uniformity of Cell Effective Voltage.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

QBLKe: Host-side flash translation layer management for Open-Channel SSDs.

[BibT_eX]

[DOI]

J. Syst. Archit., 2021

Better atomic writes by exposing the flash out-of-band area to file systems.

[BibT_eX]

[DOI]

Proceedings of the LCTES '21: 22nd ACM SIGPLAN/SIGBED International Conference on Languages, 2021

CERES: Container-Based Elastic Resource Management System for Mixed Workloads.

[BibT_eX]

[DOI]

Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021

MORE<sup>2</sup>: Morphable Encryption and Encoding for Secure NVM.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Improving the energy efficiency of STT-MRAM based approximate cache.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Low-Overhead Encoding Scheme to Extend the Lifetime of Nonvolatile Memories.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Multiple Subpage Writing FTL in MLC by Exploiting Dual Mode Operations.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability.

[BibT_eX]

[DOI]

IEEE Access, 2020

MorLog: Morphable Hardware Logging for Atomic Persistence in Non-Volatile Main Memory.

[BibT_eX]

[DOI]

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

CCHL: Compression-Consolidation Hardware Logging for Efficient Failure-Atomic Persistent Memory Updates.

[BibT_eX]

[DOI]

Proceedings of the ICPP 2020: 49th International Conference on Parallel Processing, 2020

Mass: Workload-Aware Storage Policy for OpenStack Swift.

[BibT_eX]

[DOI]

Proceedings of the ICPP 2020: 49th International Conference on Parallel Processing, 2020

AetEC: Adaptive error-tolerant Erasure Coding Scheme Within SSDs.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

DualFS: A Coordinative Flash File System with Flash Block Dual-mode Switching.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2019

Cross-point Resistive Memory: Nonideal Properties and Solutions.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2019

NICO: Reducing Software-Transparent Crash Consistency Cost for Persistent Memory.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Per-File Secure Deletion for Flash-Based Solid State Drives.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Conference on Networking, 2019

CeSR: A Cell State Remapping Strategy to Reduce Raw Bit Error Rate of MLC NAND Flash.

[BibT_eX]

[DOI]

Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019

Tiered-ReRAM: A Low Latency and Energy Efficient TLC Crossbar ReRAM Architecture.

[BibT_eX]

[DOI]

Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019

ReRAM Crossbar-Based Analog Computing Architecture for Naive Bayesian Engine.

[BibT_eX]

[DOI]

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

Accelerating garbage collection for 3D MLC flash memory with SLC blocks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

QBLK: Towards Fully Exploiting the Parallelism of Open-Channel SSDs.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Adaptive Granularity Encoding for Energy-efficient Non-Volatile Main Memory.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

An Efficient Spare-Line Replacement Scheme to Enhance NVM Security.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

CACF: A Novel Circuit Architecture Co-optimization Framework for Improving Performance, Reliability and Energy of ReRAM-based Main Memory System.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2018

Asymmetric-ReRAM: A Low Latency and High Reliability Crossbar Resistive Memory Architecture.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018

Aliens: a novel hybrid architecture for resistive random-access memory.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

An efficient PCM-based main memory system via exploiting fine-grained dirtiness of cachelines.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Extending the lifetime of NVMs with compression.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

I/O Stack Optimization for Efficient and Scalable Access in FCoE-Based SAN Storage.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2017

Time and Space-Efficient Write Parallelism in PCM by Exploiting Data Patterns.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

一种基于热数据识别技术的UBIFS优化方案 (Optimization Scheme of UBIFS Based on Hot Data Identification Technology).

[BibT_eX]

[DOI]

计算机科学, 2017

Encoding Separately: An Energy-Efficient Write Scheme for MLC STT-RAM.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Improving Performance of TLC RRAM with Compression-Ratio-Aware Data Encoding.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

DAWS: Exploiting Crossbar Characteristics for Improving Write Performance of High Density Resistive Memory.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Using Disturbance Compensation and Data Clustering (DC)2 to Improve Reliability and Performance of 3D MLC Flash Memory.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Mapping granularity adaptive FTL based on flash page re-programming.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

A Novel ReRAM-based Main Memory Structure for Optimizing Access Latency and Reliability.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

2016

MaxPB: Accelerating PCM Write by Maximizing the Power Budget Utilization.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2016

A user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash.

[BibT_eX]

[DOI]

J. Syst. Archit., 2016

Tetris Write: Exploring More Write Parallelism Considering PCM Asymmetries.

[BibT_eX]

[DOI]

Proceedings of the 45th International Conference on Parallel Processing, 2016

Application-Aware and Software-Defined SSD Scheme for Tencent Large-Scale Storage System.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Conference on Parallel and Distributed Systems, 2016

Exploiting more parallelism from write operations on PCM.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

A software-defined fusion storage system for PCM and NAND flash.

[BibT_eX]

[DOI]

Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Fast FCoE: An Efficient and Scale-Up Multi-core Framework for FCoE-Based SAN Storage Systems.

[BibT_eX]

[DOI]

Proceedings of the 44th International Conference on Parallel Processing, 2015

2014

Improving Hybrid FTL by Fully Exploiting Internal SSD Parallelism with Virtual Blocks.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2014

DT-GC: Adaptive Garbage Collection with Dynamic Thresholds for SSDs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Cloud Computing and Big Data, 2014

2013

Per-File Secure Deletion Combining with Enhanced Reliability for SSDs.

[BibT_eX]

[DOI]

Proceedings of the Grid and Pervasive Computing - 8th International Conference, 2013

2012

A Parity Scheme to Enhance Reliability for SSDs.

[BibT_eX]

[DOI]

Proceedings of the Seventh IEEE International Conference on Networking, 2012

vSuit: QoS-oriented Scheduler in Network Virtualization.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Advanced Information Networking and Applications Workshops, 2012

2010

Achieving page-mapping FTL performance at block-mapping FTL cost by hiding address translation.

[BibT_eX]

[DOI]

Proceedings of the IEEE 26th Symposium on Mass Storage Systems and Technologies, 2010

2007

Implementation of FC-1 and FC-2 Layer for Multi-Gigabit Fibre Channel Transport.

[BibT_eX]

[DOI]

Proceedings of the Future Generation Communication and Networking, 2007

Wei Tong

Timeline

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