Wei Ting Loke

According to our database, Wei Ting Loke authored at least 7 papers between 2007 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

An Energy-Efficient Design-Time Scheduler for FPGAs Leveraging Dynamic Frequency Scaling Emulation (Abstract Only).

Wei Ting Loke, Chin Yang Koay

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016

Energy-aware scheduling for task adaptive FPGAs.

Wei Ting Loke, Chin Yang Koay

Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

2013

Criticality-based routing for FPGAS with reverse body bias switch box architectures.

Wei Ting Loke, Wenfeng Zhao, Yajun Ha

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012

A Power and Cluster-Aware Technology Mapping and Clustering Scheme for Dual-VT FPGAs.

Wei Ting Loke, Yajun Ha, Wenfeng Zhao

Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Power-aware FPGA technology mapping for programmable-VT architectures (abstract only).

Wei Ting Loke, Yajun Ha

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

A Routing Architecture for FPGAs with Dual-VT Switch Box and Logic Clusters.

Wei Ting Loke, Yajun Ha

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2007

Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools.

Chee Sing Lee, Wei Ting Loke, Wenjuan Zhang, Yajun Ha

Proceedings of the FPL 2007, 2007