Wei-Ting Jonas Chan

According to our database1, Wei-Ting Jonas Chan authored at least 14 papers between 2013 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2017
Trading Accuracy for Energy in Stochastic Circuit Design.
ACM J. Emerg. Technol. Comput. Syst., 2017

Revisiting 3DIC benefit with multiple tiers.
Integr., 2017

Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning.
Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

ILP-Based Identification of Redundant Logic Insertions for Opportunistic Yield Improvement during Early Process Learning.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

2016
BEOL stack-aware routability prediction from placement using data mining techniques.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Learning-based prediction of embedded memory timing failures during initial floorplan design.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Optimizing Stochastic Circuits for Accuracy-Energy Tradeoffs.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

3DIC benefit estimation and implementation guidance from 2DIC implementation.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
On Aging-Aware Signoff for Circuits With Adaptive Voltage Scaling.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Methodology for electromigration signoff in the presence of adaptive voltage scaling.
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2014

The ITRS MPU and SOC system drivers: Calibration and implications for design-based equivalent scaling in the roadmap.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

ITRS 2.0: Toward a re-framing of the Semiconductor Technology Roadmap.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2013
Statistical analysis and modeling for error composition in approximate computation circuits.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Impact of adaptive voltage scaling on aging-aware signoff.
Proceedings of the Design, Automation and Test in Europe, 2013


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