Wei-Lun Wang

According to our database, Wei-Lun Wang authored at least 11 papers between 1992 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Broadband fluorescence enhancement in Cr-doped fibers.

Chun-Nien Liu, Yi-Chung Huang, Yen-Sheng Lin, Jau-Sheng Wang, Fang-Yen Lo, Wei-Lun Wang, Ta-Lung Chou, Pi Ling Huang, Sheng-Lung Huang, Wood-Hi Cheng

Proceedings of the 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), 2013

Fabrication of few-mode crystalline core fiber.

Chih-Wei Chuang, Wei-Lun Wang, Fang-Yen Lo, Chun-Nien Liu, Yi-Chung Huang, Ta-Lung Chou, Wood-Hi Cheng, Sheng-Lung Huang

Proceedings of the 6th IEEE International Conference on Advanced Infocomm Technology, 2013

2012

2-Connected relay placement problem in wireless sensor networks.

Wei-Lun Wang, Bang-Heng Liou, Aaron Solomon

Proceedings of the 2012 Second International Conference on Digital Information and Communication Technology and it's Applications (DICTAP), 2012

2010

Relay Placement Problem in Smart Grid Deployment.

Wei-Lun Wang, Quincy Wu

Proceedings of the Leveraging Applications of Formal Methods, Verification, and Validation, 2010

2005

A complete memory address generator for scan based March algorithms.

Wei-Lun Wang, Kuen-Jong Lee

Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005

2004

March Based Memory Core Test Scheduling for SOC.

Wei-Lun Wang

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

2002

An Efficient Deterministic Test Pattern Generator for Scan-Based BIST Environment.

Wei-Lun Wang, Kuen-Jong Lee

J. Electron. Test., 2002

2001

An on-chip march pattern generator for testing embedded memory cores.

Wei-Lun Wang, Kuen-Jong Lee, Jhing-Fa Wang

IEEE Trans. Very Large Scale Integr. Syst., 2001

2000

Accelerated test pattern generators for mixed-mode BIST environments.

Wei-Lun Wang, Kuen-Jong Lee

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1998

A General Structure of Feedback Shift Registers for Built-In Self Test.

Kuen-Jong Lee, Wei-Lun Wang, Jhing-Fa Wang

J. Inf. Sci. Eng., 1998

1992

A Fast Testing Method for Sequential Circuits at the State Trasition Level.

Wei-Lun Wang, Jhing-Fa Wang, Kuen-Jong Lee

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992