Wei-Che Tseng
According to our database1,
Wei-Che Tseng
authored at least 26 papers
between 2008 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Late Breaking Results: Power Rail Routing for Advanced Multi-Layered Printed Circuit Boards.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
2023
A General Wavelength-Routed Optical Networks-on-Chip Model with Applications to Provably Good Customized and Fault-Tolerant Topology Designs.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Late Breaking Results: Analytical Placement for 3D ICs with Multiple Manufacturing Technologies.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2014
Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors.
ACM Trans. Embed. Comput. Syst., 2014
IEEE Trans. Computers, 2014
2013
J. Signal Process. Syst., 2013
Data Allocation Optimization for Hybrid Scratch Pad Memory With SRAM and Nonvolatile Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2013
Write activity reduction on non-volatile main memories for embedded chip multiprocessors.
ACM Trans. Embed. Comput. Syst., 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Minimizing Access Cost for Multiple Types of Memory Units in Embedded Systems Through Data Allocation and Scheduling.
IEEE Trans. Signal Process., 2012
Optimizing Data Allocation and Memory Configuration for Non-Volatile Memory Based Hybrid SPM on Embedded CMPs.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Variable Partitioning and Scheduling for MPSoC with Virtually Shared Scratch Pad Memory.
J. Signal Process. Syst., 2010
EURASIP J. Embed. Syst., 2010
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010
Proceedings of the IEEE 8th Symposium on Application Specific Processors, 2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation.
Proceedings of the 47th Design Automation Conference, 2010
2009
Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009
Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009
2008
Proceedings of the Wireless Algorithms, 2008
Loop scheduling and assignment to minimize energy while hiding latency for heterogeneous multi-bank memory.
Proceedings of the FPL 2008, 2008
QoS for Networked Heterogeneous Real-Time Embedded Systems.
Proceedings of the ISCA 21st International Conference on Parallel and Distributed Computing and Communication Systems, 2008