Wayne Wong

According to our database, Wayne Wong authored at least 3 papers between 2003 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

A quad-channel 112-128 Gb/s coherent transmitter in 40 nm CMOS.

Adesh Garg, Ullas Singh, Nick Huang, Wayne Wong, Bin Liu, Zhi Chao Huang, Afshin Momtaz, Jun Cao

Proceedings of the Symposium on VLSI Circuits, 2014

2003

40-43-Gb/s OC-768 16: 1 MUX/CMU chipset with SFI-5 compliance.

Hai Tao, Derek K. Shaeffer, Min Xu, Saied Benyamin, Vincent Condito, Steffen Kudszus, Qinghung Lee, Adrian Ong, Arvin Shahani, Xiaomin Si, Wayne Wong, Maurice Tarsia

IEEE J. Solid State Circuits, 2003

A 40-43-Gb/s clock and data recovery IC with integrated SFI-5 1: 16 demultiplexer in SiGe technology.

Adrian Ong, Saied Benyamin, Jason Cancio, Vincent Condito, Tad Labrie, Qinghung Lee, John Paul Mattia, Derek K. Shaeffer, Arvin Shahani, Xiaomin Si, Hai Tao, Maurice Tarsia, Wayne Wong, Min Xu

IEEE J. Solid State Circuits, 2003