Wataru Wakamiya

According to our database, Wataru Wakamiya authored at least 3 papers between 1989 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

Novel via Chain Structure for Failure Analysis at 65 nm-Node Fixing OPC Using Inner and Outer via Chain Dummy Patterns.

Takashi Nasuno, Yoshihisa Matsubara, Hiromasa Kobayashi, Akiyuki Minami, Eiichi Soda, Hiroshi Tsuda, Koichiro Tsujita, Wataru Wakamiya, Nobuyoshi Kobayashi

IEICE Trans. Electron., 2005

1992

A 34-ns 16-Mb DRAM with controllable voltage down-converter.

Hideto Hidaka, Kazutami Arimoto, Kazutoshi Hirayama, Masanori Hayashikoshi, Mikio Asakura, Masaki Tsukude, Tsukasa Oishi, Shinji Kawai, Katsuhiro Suma, Yasuhiro Konishi, Koji Tanaka, Wataru Wakamiya, Yoshikazu Ohno, Kazuyasu Fujishima

IEEE J. Solid State Circuits, July, 1992

1989

A 60-ns 3.3-V-only 16-Mbit DRAM with multipurpose register.

Kazutami Arimoto, Kazuyasu Fujishima, Yoshio Matsuda, Masaki Tsukude, Tukasa Oishi, Wataru Wakamiya, Shin'ichi Satoh, Michihiro Yamada, Takao Nakano

IEEE J. Solid State Circuits, October, 1989