Wangyang Zhang

According to our database1, Wangyang Zhang authored at least 20 papers between 2008 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Attention Routing: track-assignment detailed routing using attention-based reinforcement learning.
CoRR, 2020

2016
Bayesian Model Fusion: Large-Scale Performance Modeling of Analog and Mixed-Signal Circuits by Reusing Early-Stage Data.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

2013
Efficient Spatial Pattern Analysis for Variation Decomposition Via Robust Sparse Regression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Test data analytics - Exploring spatial and test-item correlations in production test data.
Proceedings of the 2013 IEEE International Test Conference, 2013

Automatic clustering of wafer spatial signatures.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
IC Spatial Variation Modeling: Algorithms and Applications.
PhD thesis, 2012

Spatial variation decomposition via sparse regression.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

A dynamic method for efficient random mismatch characterization of standard cells.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Large-scale statistical performance modeling of analog and mixed-signal circuits.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Test cost reduction through performance prediction using virtual probe.
Proceedings of the 2011 IEEE International Test Conference, 2011

Toward efficient spatial variation decomposition via sparse regression.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Parallel statistical capacitance extraction of on-chip interconnects with an improved geometric variation model.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Bayesian virtual probe: minimizing variation characterization cost for nanoscale IC technologies via Bayesian inference.
Proceedings of the 47th Design Automation Conference, 2010

Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression.
Proceedings of the 47th Design Automation Conference, 2010

2009
Variational capacitance extraction of on-chip interconnects based on continuous surface model.
Proceedings of the 46th Design Automation Conference, 2009

2008
An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation.
Proceedings of the Design, Automation and Test in Europe, 2008


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