Wanghua Wu

According to our database, Wanghua Wu authored at least 18 papers between 2008 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC).

Wanghua Wu, Hiroyuki Ito, Jens Anders, Ahmed M. A. Ali, Gaël Pillonnet

IEEE J. Solid State Circuits, 2022

A 16-Channel, 28/39GHz Dual-Polarized 5G FR2 Phased-Array Transceiver IC with a Quad-Stream IF Transceiver Supporting Non-Contiguous Carrier Aggregation up to 1.6GHz BW.

Ashutosh Verma, Venumadhav Bhagavatula, Amitoj Singh, Wanghua Wu, Hariharan Nagarajan, Pak-Kim Lau, Xiaohua Yu, Omar Elsayed, Ajaypat Jain, Anirban Sarkar, Fan Zhang, Che-Chun Kuo, Patrick McElwee, Pei-Yuan Chiang, Chengkai Guo, Zhanjun Bai, Tienyu Chang, Abishek Mann, Andreas Rydin, Xingliang Zhao, Jeiyoung Lee, Daeyoung Yoon, Chih-Wei Yao, Siuchuang-Ivan Lu, Sang Won Son, Thomas Byunghak Cho

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

A 14-nm Ultra-Low Jitter Fractional-N PLL Using a DTC Range Reduction Technique and a Reconfigurable Dual-Core VCO.

Wanghua Wu, Chih-Wei Yao, Chengkai Guo, Pei-Yuan Chiang, Lei Chen, Pak-Kim Lau, Zhanjun Bai, Sang Won Son, Thomas Byunghak Cho

IEEE J. Solid State Circuits, 2021

32.2 A 14nm Analog Sampling Fractional-N PLL with a Digital-to-Time Converter Range-Reduction Technique Achieving 80fs Integrated Jitter and 93fs at Near-Integer Channels.

Wanghua Wu, Chih-Wei Yao, Chengkai Guo, Pei-Yuan Chiang, Pak-Kim Lau, Lei Chen, Sang Won Son, Thomas Byunghak Cho

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Session 32 Overview: Frequency Synthesizers Rf Subcommittee.

Wei Deng, Jaehyouk Choi, Wanghua Wu

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

A 28-nm 75-fs_rms Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction.

Wanghua Wu, Chih-Wei Yao, Kunal Godbole, Ronghua Ni, Pei-Yuan Chiang, Yongping Han, Yongrong Zuo, Ashutosh Verma, Ivan Siu-Chuang Lu, Sang Won Son, Thomas Byunghak Cho

IEEE J. Solid State Circuits, 2019

2017

A 14-nm 0.14-ps_rms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration.

Chih-Wei Yao, Ronghua Ni, Chung Lau, Wanghua Wu, Kunal Godbole, Yongrong Zuo, Sangsoo Ko, Nam-Seog Kim, Sangwook Han, Ikkyun Jo, Joonhee Lee, Juyoung Han, Daehyeon Kwon, Chulho Kim, Shinwoong Kim, Sang Won Son, Thomas Byunghak Cho

IEEE J. Solid State Circuits, 2017

2016

9.4 A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation.

Renaldi Winoto, Ashkan Olyaei, Mohammad Hajirostam, Wai Lau, Xiang Gao, Arnab Mitra, Ovidiu Carnu, Philip Godoy, Luns Tee, Hao Li, Erdem Erdogan, Alden Wong, Qiang Zhu, Timothy Loo, Fan Zhang, Liwei Sheng, Donghong Cui, Anuranjan Jha, Xiang Li, Wanghua Wu, Kun-Seok Lee, Derek Cheung, Ka Wo Pang, Haisong Wang, Jiexi Liu, Xingliang Zhao, Daibashish Gangopadhyay, David Cousinard, Arvind Anumula Paramanandam, Xiaoang Li, Norman Liu, Weiwei Xu, Yuan Fang, Xiaoyue Wang, Randy Tsang, Li Lin

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

9.6 A 2.7-to-4.3GHz, 0.16psrms-jitter, -246.8dB-FOM, digital fractional-N sampling PLL in 28nm CMOS.

Xiang Gao, Olivier Burg, Haisong Wang, Wanghua Wu, Cao-Thong Tu, Konstantinos Manetakis, Fan Zhang, Luns Tee, Mustafa Yayla, Sining Xiang, Randy Tsang, Li Lin

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

9.4 A 28nm CMOS digital fractional-N PLL with -245.5dB FOM and a frequency tripler for 802.11abgn/ac radio.

Xiang Gao, Luns Tee, Wanghua Wu, Kun-Seok Lee, Arvind Anumula Paramanandam, Anuranjan Jha, Norman Liu, Edwin Chan, Li Lin

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

A 56.4-to-63.4 GHz Multi-Rate All-Digital Fractional-N PLL for FMCW Radar Applications in 65 nm CMOS.

Wanghua Wu, Robert Bogdan Staszewski, John R. Long

IEEE J. Solid State Circuits, 2014

Design for test of a mm-Wave ADPLL-based transmitter.

Wanghua Wu, Robert Bogdan Staszewski, John R. Long

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

High-Resolution Millimeter-Wave Digitally Controlled Oscillators With Reconfigurable Passive Resonators.

Wanghua Wu, John R. Long, Robert Bogdan Staszewski

IEEE J. Solid State Circuits, 2013

A 56.4-to-63.4GHz spurious-free all-digital fractional-N PLL in 65nm CMOS.

Wanghua Wu, Xuefei Bai, Robert Bogdan Staszewski, John R. Long

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

Passive Circuit Technologies for mm-Wave Wireless Systems on Silicon.

John R. Long, Yi Zhao, Wanghua Wu, Marco Spirito, Leonardo Vera, Edward Gordon

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011

Circuit technologies for mm-wave wireless systems on silicon.

John R. Long, Yi Zhao, Y. Jin, Wanghua Wu, Marco Spirito

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2008

17 GHz RF Front-Ends for Low-Power Wireless Sensor Networks.

Wanghua Wu, Mihai A. T. Sanduleanu, Xia Li, John R. Long

IEEE J. Solid State Circuits, 2008

Energy-efficient wireless front-end concepts for ultra lower power radio.

John R. Long, Wanghua Wu, Yunzhi Dong, Yi Zhao, Mihai A. T. Sanduleanu, John F. M. Gerrits, Gerrit van Veenendaal

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008