Wan-Yu Wen

According to our database1, Wan-Yu Wen authored at least 6 papers between 2013 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
A novel low-cost dynamic logic reconfigurable structure strategy for low power optimization.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Novel Spare TSV Deployment for 3-D ICs Considering Yield and Timing Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Q-Learning Based Dynamic Voltage Scaling for Designs with Graceful Degradation.
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

2014
A Fuzzy-Matching Model With Grid Reduction for Lithography Hotspot Detection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Critical Path Monitor Enabled Dynamic Voltage Scaling for Graceful Degradation in Sub-Threshold Designs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
A novel fuzzy matching model for lithography hotspot detection.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013


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