Wajih El Hadj Youssef

Orcid: 0000-0002-3529-9415

According to our database1, Wajih El Hadj Youssef authored at least 13 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2023
A Secure Chaos-Based Lightweight Cryptosystem for the Internet of Things.
IEEE Access, 2023

Integration of Lightweights Blocks Ciphers as an Extension into Microprocessor for IoT Security.
Proceedings of the 20th International Multi-Conference on Systems, Signals & Devices, 2023

2022
An Efficient Lightweight Cryptographic Instructions Set Extension for IoT Device Security.
Secur. Commun. Networks, 2022

2020
Hardware Implementation of Secure Lightweight Cryptographic Designs for IoT Applications.
Secur. Commun. Networks, 2020

Design and Implementation on FPGA Board of a Chaos-based Stream Cipher.
Proceedings of the 15th International Conference for Internet Technology and Secured Transactions, 2020

2019
FPGA Implementation of a Pseudo-Chaotic Number Generator and Evaluation of its Performance.
Proceedings of the International Conference on Internet of Things, 2019

2018
Performance Analysis of a Multicore Based LEON3 Integrating a RTOS.
Proceedings of the 15th International Multi-Conference on Systems, Signals & Devices, 2018

2017
The design of an embedded system (SOPC) for an image processing application.
Proceedings of the International Conference on Control, Automation and Diagnosis, 2017

2016
A deep analysis of SEU consequences in the internal memory of LEON3 processor.
Proceedings of the 17th Latin-American Test Symposium, 2016

2015
Enhancing a 32-Bit Processor Core with Efficient Cryptographic Instructions.
J. Circuits Syst. Comput., 2015

2014
A low-resource 32-bit datapath ECDSA design for embedded applications.
Proceedings of the International Carnahan Conference on Security Technology, 2014

Instruction set extensions of AES algorithms for 32-bit processors.
Proceedings of the International Carnahan Conference on Security Technology, 2014

2012
A compact 32-bit AES design for embedded system.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012


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