Wai-Yeung Yip
According to our database1,
Wai-Yeung Yip
authored at least 1 paper
in 2007.
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Bibliography
2007
System Co-Design and Co-Analysis Approach to Implementing the XDR Memory System of the Cell Broadband Engine Processor; Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007