Wael M. Elsharkasy
Orcid: 0000-0002-4673-1891
According to our database1,
Wael M. Elsharkasy
authored at least 6 papers
between 2013 and 2017.
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Bibliography
2017
Reliability Enhancement of Low-Power Sequential Circuits Using Reconfigurable Pulsed Latches.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
AS8-static random access memory (SRAM): asymmetric SRAM architecture for soft error hardening enhancement.
IET Circuits Devices Syst., 2017
Efficient pulsed-latch implementation for multiport register files: work-in-progress.
Proceedings of the 2017 International Conference on Compilers, 2017
2015
NUVA: Architectural support for runtime verification of parametric specifications over multicores.
Proceedings of the 2015 International Conference on Compilers, 2015
2013
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013