W. J. Toren

According to our database, W. J. Toren authored at least 2 papers between 2002 and 2012.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2012

Analysis and optimization of lateral thin-film Silicon-on-insulator (SOI) MOSFET transistors.

Ignasi Cortés, Gaëtan Toulon, Frederic Morancho, E. Hugonnard-Bruyere, B. Villard, W. J. Toren

Microelectron. Reliab., 2012

2002

Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC).

Thierry Devoivre, M. Lunenborg, C. Julien, J.-P. Carrere, P. Ferreira, W. J. Toren, A. VandeGoor, P. Gayet, T. Berger, O. Hinsinger, P. Vannier, Y. Trouiller, Y. Rody, P.-J. Goirand, R. Palla, I. Thomas, F. Guyader, David Roy, B. Borot, Nicolas Planes, Sylvie Naudet, F. Pico, D. Duca, F. Lalanne, D. Heslinga, M. Haond

Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002