Vu Trung Duong Le

According to our database, Vu Trung Duong Le authored at least 23 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography.

Hoai Luan Pham, Vu Trung Duong Le, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima

IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024

Flexible and Energy-Efficient Crypto-Processor for Arbitrary Input Length Processing in Blockchain-Based IoT Applications.

Vu Trung Duong Le, Hoai-Luan Pham, Thi Hong Tran, Yasuhiko Nakashima

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024

Theoretical Analysis of the Efficient-Memory Matrix Storage Method for Quantum Emulation Accelerators with Gate Fusion on FPGAs.

Tran Xuan Hieu Le, Hoai Luan Pham, Tuan Hai Vu, Vu Trung Duong Le, Nakashima Yasuhiko

CoRR, 2024

Exploring the Limitations of Kolmogorov-Arnold Networks in Classification: Insights to Software Training and Hardware Implementation.

Van Duy Tran, Tran Xuan Hieu Le, Thi Diem Tran, Hoai Luan Pham, Vu Trung Duong Le, Tuan Hai Vu, Van Tinh Nguyen, Yasuhiko Nakashima

CoRR, 2024

MRCA: Multi-grained Reconfigurable Cryptographic Accelerator for Diverse Security Requirements.

Pham Hoai Luan, Hai Hau Nguyen, Vu Trung Duong Le, Thi Diem Tran, Tuan Hai Vu, Thi Hong Tran, Yasuhiko Nakashima

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2024

2023

Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-Based IoT Applications.

Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima

IEEE Des. Test, October, 2023

Power-Efficient and Programmable Hashing Accelerator for Massive Message Processing.

Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Thi Hong Tran, Yasuhiko Nakashima

Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Small-Footprint Reconfigurable Heterogeneous Cryptographic Accelerator for Fog Computing.

Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Ren Imamura, Thi Hong Tran, Yasuhiko Nakashima

Proceedings of the International Conference on Computing and Communication Technologies, 2023

Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating Blockchain.

Pham Hoai Luan, Thi Sang Duong, Vu Trung Duong Le, Thi Hong Tran, Yasuhiko Nakashima

Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

High-efficiency Reconfigurable Crypto Accelerator Utilizing Innovative Resource Sharing and Parallel Processing.

Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission.

Thi Sang Duong, Hoai Luan Pham, Vu Trung Duong Le, Thi Diem Tran, Ren Imamura, Quoc Duy Nam Nguyen, Thi Hong Tran, Yasuhiko Nakashima

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

RHCP: A Reconfigurable High-efficient Cryptographic Processor for Decentralized IoT Platforms.

Vu Trung Duong Le, Hoai Luan Pham, Thi Sang Duong, Thi Hong Tran, Quoc Duy Nam Nguyen, Yasuhiko Nakashima

Proceedings of the 15th International Conference on Knowledge and Systems Engineering, 2023

Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications.

Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Quoc Duy Nam Nguyen, Thi Sang Duong, Yasuhiko Nakashima

Proceedings of the International Conference on IC Design and Technology, 2023

Efficient and High-Speed CGRA Accelerator for Cryptographic Applications.

Vu Trung Duong Le, Hoai Luan Pham, Thi Hong Tran, Thi Sang Duong, Yasuhiko Nakashima

Proceedings of the Eleventh International Symposium on Computing and Networking, CANDAR 2023, Matsue, Japan, November 28, 2023

2022

Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator.

Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima

IEEE Access, 2022

A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator.

Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima

IEEE Access, 2022

A Flexible and Energy-Efficient BLAKE-256/2s Co-Processor for Blockchain-based IoT Applications.

Pham Hoai Luan, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima

Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

CSIP: A Compact Scrypt IP design with single PBKDF2 core for Blockchain mining.

Vu Trung Duong Le, Pham Hoai Luan, Thi Hong Tran, Yasuhiko Nakashima

Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

A High-Efficiency FPGA-based BLAKE-256 Accelerator for Securing Blockchain Networks.

Pham Hoai Luan, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

A Coarse Grained Reconfigurable Architecture for SHA-2 Acceleration.

Hoai Luan Pham, Thi Hong Tran, Vu Trung Duong Le, Yasuhiko Nakashima

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

2021

MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security.

Vu Trung Duong Le, Thi Hong Tran, Hoai Luan Pham, Duc Khai Lam, Yasuhiko Nakashima

IEEE Access, 2021

2020

A fast approach for bitcoin blockchain cryptocurrency mining system.

Vu Trung Duong Le, Nguyen Thi Thanh Thuy, Lam Duc Khai

Integr., 2020

Double SHA-256 Hardware Architecture With Compact Message Expander for Bitcoin Mining.

Hoai Luan Pham, Thi Hong Tran, Tri Dung Phan, Vu Trung Duong Le, Duc Khai Lam, Yasuhiko Nakashima

IEEE Access, 2020