Vojtech Miskovský

According to our database, Vojtech Miskovský authored at least 17 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Impact of Compiler Optimization Flags on Side-Channel Information Leakage of SipHash Algorithm.

Matús Oleksák, Vojtech Miskovský

Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

2023

Is ASCON the best choice regarding the Side-channel Analysis?

Matús Oleksák, Vojtech Miskovský

Proceedings of the 12th Mediterranean Conference on Embedded Computing, 2023

2022

A Comprehensive Survey on the Non-Invasive Passive Side-Channel Analysis.

Petr Socha, Vojtech Miskovský, Martin Novotný

Sensors, 2022

A fair experimental evaluation of distance correlation side-channel distinguisher.

Petr Socha, Vojtech Miskovský, Martin Novotný

Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

Correlation Power Analysis of SipHash.

Matús Oleksák, Vojtech Miskovský

Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

2021

High-level synthesis, cryptography, and side-channel countermeasures: A comprehensive evaluation.

Petr Socha, Vojtech Miskovský, Martin Novotný

Microprocess. Microsystems, September, 2021

Secure and dependable: Area-efficient masked and fault-tolerant architectures.

Vojtech Miskovský, Hana Kubátová, Martin Novotný

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

2019

Efficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivative.

Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný

Microprocess. Microsystems, 2019

First-Order and Higher-Order Power Analysis: Computational Approaches and Aspects.

Petr Socha, Vojtech Miskovský, Martin Novotný

Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

2018

High-speed Side-channel-protected Encryption and Authentication in Hardware.

Nele Mentens, Vojtech Miskovský, Martin Novotný, Jo Vliegen

IACR Cryptol. ePrint Arch., 2018

Speeding up differential power analysis using integrated power traces.

Vojtech Miskovský, Hana Kubátová, Martin Novotný

Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018

Correlation Power Analysis Distinguisher Based on the Correlation Trace Derivative.

Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Dummy Rounds as a DPA Countermeasure in Hardware.

Stanislav Jerabek, Jan Schmidt, Martin Novotný, Vojtech Miskovský

Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017

Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA.

Vojtech Miskovský, Hana Kubátová, Martin Novotný

Microprocess. Microsystems, 2017

Influence of Fault-Tolerance Techniques on Power-Analysis Resistance of Cryptographic Design.

Jan Riha, Vojtech Miskovský, Hana Kubátová, Martin Novotný

Proceedings of the Euromicro Conference on Digital System Design, 2017

Optimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches.

Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný

Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

2016

Influence of fault-tolerant design methods on differential power analysis resistance of AES cipher: Methodics and challenges.

Vojtech Miskovský, Hana Kubátová, Martin Novotný

Proceedings of the 5th Mediterranean Conference on Embedded Computing, 2016