Vladimir M. Rajovic

Orcid: 0000-0001-6881-7728

According to our database1, Vladimir M. Rajovic authored at least 14 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of six.

Timeline

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Bibliography

2022
Digital Image Decoder for Efficient Hardware Implementation.
Sensors, 2022

A Distributed Method for Self-Calibration of Magnetoresistive Angular Position Sensor within a Servo System.
Sensors, 2022

2021
Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2-D Forward Discrete Wavelet Transform.
Microprocess. Microsystems, November, 2021

2019
Novel one-dimensional and two-dimensional forward discrete wavelet transform 5/3 filter architectures for efficient hardware implementation.
J. Real Time Image Process., 2019

Novel Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2D Inverse DWT.
J. Circuits Syst. Comput., 2019

Comparative Analysis of Memory Efficient Hardware Architectures for Lifting Based and Non-Stationary Filter Based 5/3 2-D Inverse DWT.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

2018
Efficient one-dimensional forward and inverse discrete wavelet transformers.
Microprocess. Microsystems, 2018

A Floating Linear Voltage Regulator for Powering Large-Scale Differential Communication Networks.
IEEE Access, 2018

2017
High-Performance 1-D and 2-D Inverse DWT 5/3 Filter Architectures for Efficient Hardware Implementation.
Circuits Syst. Signal Process., 2017

Efficient inverse discrete wavelet transformer.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

Efficient forward discrete wavelet transformer.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

2015
Hardware realization of inverse subband transformer with minimum used resources.
Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015

Hardware realization of direct subband transformer with minimum used resources.
Proceedings of the 4th Mediterranean Conference on Embedded Computing, 2015

2013
An image codec with minimum memory size.
Proceedings of the 2nd Mediterranean Conference on Embedded Computing, 2013


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