Vladimir I. Prodanov

According to our database1, Vladimir I. Prodanov authored at least 17 papers between 1994 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
Providing Cadence Feedback in Real-Time to Guide Cardiovascular Workouts.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2018
Relationship Between Time-constants and 3dB Cutoff of High-Order Damped LTI Systems.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Experimental Study and Modeling of the gm-I Dependence of Long-Channel MOSFETs.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2013
A Class-C amplifier linearized by a constant conduction angle biasing circuit.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012
Empirical model for the transconductance-current dependence of short-channel MOSFETs.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2006
A 32-mW 320-MHz continuous-time complex delta-sigma ADC for multi-mode wireless-LAN receivers.
IEEE J. Solid State Circuits, 2006

GHz Serial Passive Clock Distribution in VLSI Using Bidirectional Signaling.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2004
One-tap wideband I/Q compensation for zero-IF filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A "divide and conquer" technique for implementing wide dynamic range continuous-time filters.
IEEE J. Solid State Circuits, 2004

I/Q imbalance of two-path ladder filters.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002
Complex low-pass filters.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Robust high-pass and notch Gm-(grounded) C biquads: how many different topologies are there?
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

7V tristate-capable output buffer implemented in standard 2.5 V CMOS process.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
V-I converters with transconductance proportional to bias current in any technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A method for reducing the variation in "on" resistance of a MOS sampling switch.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1998
New CMOS universal constant-Gm input stage.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1994
A Current-Mode FDNR Circuit Element using Capacitive Gyrators.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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