Vivek Nautiyal
Orcid: 0000-0002-5837-3390
According to our database1,
Vivek Nautiyal
authored at least 10 papers
between 2017 and 2024.
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Bibliography
2024
Efficient Repair Configuration Algorithm, for Improving Yield of Semiconductor Memories.
Proceedings of the 14th IEEE Annual Computing and Communication Workshop and Conference, 2024
2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2018
Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017
Self-timed Power-on Reset Circuit for Pseudo Dual/Two Port SRAM Used in Low-Voltage IoT Applications.
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017
An ultra high density pseudo dual-port SRAM in 16nm FINFET process for graphics processors.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Proceedings of the Computer Vision, Pattern Recognition, Image Processing, and Graphics, 2017
Charge recycled low power SRAM with integrated write and read assist, for wearable electronics, designed in 7nm FinFET.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017