Vitor G. Lima

According to our database, Vitor G. Lima authored at least 4 papers between 2018 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

Optimizing the Montgomery Modular Multiplier for a Power- and Area-Efficient Hardware Architecture.

Mateus Terribele Leme, Guilherme Paim, Leandro M. G. Rocha, Patrícia Ücker, Vitor G. Lima, Rafael Soares, Eduardo A. C. da Costa, Sergio Bampi

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Evaluating Cell Library Sizing Methodologies for Ultra-Low Power Near-Threshold Operation in Bulk CMOS.

Rodrigo N. Wuerdig, Vitor G. Lima, Filipe D. Baumgratz, Rafael Soares, Sergio Bampi

Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

2019

Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing.

Vitor G. Lima, Guilherme Paim, Leandro M. G. Rocha, Leomar S. da Rosa Jr., Felipe S. Marques, Eduardo A. C. da Costa, Vinicius V. Camargo, Rafael Soares, Sergio Bampi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

A Novel Sizing Method Aiming Security Against Differential Power Analysis.

Vitor G. Lima, Plinio Finkenauer, Vinicius V. Camargo, Felipe S. Marques, Leomar R. Junior, Rafael Iankowski Soares

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018