Vito Giovanni Castellana

Orcid: 0000-0003-3516-7903

According to our database1, Vito Giovanni Castellana authored at least 49 papers between 2011 and 2024.

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Bibliography

2024
Exploring Architectural-Aware Affinity Policies in Modern HPC Runtimes.
Proceedings of the Practice and Experience in Advanced Research Computing 2024: Human Powered Computing, 2024

Towards Automated Generation of Chiplet-Based Systems Invited Paper.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
Towards On-Chip Learning for Low Latency Reasoning with End-to-End Synthesis.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics.
IEEE Trans. Computers, 2022

End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators.
IEEE Trans. Computers, 2022

Bridging Python to Silicon: The SODA Toolchain.
IEEE Micro, 2022

SODA Synthesizer: An Open-Source, Multi-Level, Modular, Extensible Compiler from High-Level Frameworks to Silicon.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

An MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

From High-Level Frameworks to custom Silicon with SODA.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022

SO(DA)<sup>2</sup>: End-to-end Generation of Specialized Reconfigurable Architectures (Invited Talk).
Proceedings of the 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2022

The SODA approach: leveraging high-level synthesis for hardware/software co-design and hardware specialization: invited.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Towards superior software portability with SHAD and HPX C++ libraries.
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022

2021
High-Level Synthesis of Parallel Specifications Coupling Static and Dynamic Controllers.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021

Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Productive Programming of Distributed Systems with the SHAD C++ Library.
Proceedings of the HPDC '21: The 30th International Symposium on High-Performance Parallel and Distributed Computing, 2021

Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis.
Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021

OpenCGRA: Democratizing Coarse-Grained Reconfigurable Arrays.
Proceedings of the 32nd IEEE International Conference on Application-specific Systems, 2021

2020
SODA: a New Synthesis Infrastructure for Agile Hardware Design of Machine Learning Accelerators.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Practical Distributed Programming in C++.
Proceedings of the HPDC '20: The 29th International Symposium on High-Performance Parallel and Distributed Computing, 2020

Invited: Software Defined Accelerators From Learning Tools Environment.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
A Parallel Graph Environment for Real-World Data Analytics Workflows.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Software defined architectures for data analytics.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
SHAD: The Scalable High-Performance Algorithms and Data-Structures Library.
Proceedings of the 18th IEEE/ACM International Symposium on Cluster, 2018

2017
High-Performance Data Analytics Beyond the Relational and Graph Data Models with GEMS.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

2016
GraQL: A Query Language for High-Performance Attributed Graph Databases.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

Efficient synthesis of graph methods: a dynamically scheduled architecture.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

A dynamically scheduled architecture for the synthesis of graph methods.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Enabling the high level synthesis of data analytics accelerators.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

2015
In-Memory Graph Databases for Web-Scale Data.
Computer, 2015

A visual analytics paradigm enabling trillion-edge graph exploration.
Proceedings of the 5th IEEE Symposium on Large Data Analysis and Visualization, 2015

High Level Synthesis of RDF Queries for Graph Analytics.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Inter-procedural resource sharing in High Level Synthesis through function proxies.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Function Proxies for Improved Resource Sharing in High Level Synthesis.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

High-Performance, Distributed Dictionary Encoding of RDF Datasets.
Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015

GEMS: Graph Database Engine for Multithreaded Systems.
Proceedings of the Big Data - Algorithms, Analytics, and Applications., 2015

2014
C-based high level synthesis of parallel applications targeting adaptive hardware components.
PhD thesis, 2014

Toward a data scalable solution for facilitating discovery of science resources.
Parallel Comput., 2014

Scaling Semantic Graph Databases in Size and Performance.
IEEE Micro, 2014

High-level synthesis of memory bound and irregular parallel applications with Bambu.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

An adaptive Memory Interface Controller for improving bandwidth utilization of hybrid and reconfigurable systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Composing Data Parallel Code for a SPARQL Graph Engine.
Proceedings of the International Conference on Social Computing, SocialCom 2013, 2013

Applications Acceleration through Adaptive Hardware Components.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

An automated flow for the High Level Synthesis of coarse grained parallel applications.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Scheduling independent liveness analysis for register binding in high level synthesis.
Proceedings of the Design, Automation and Test in Europe, 2013

Accelerating semantic graph databases on commodity clusters.
Proceedings of the 2013 IEEE International Conference on Big Data (IEEE BigData 2013), 2013

2012
Abstract: Speeding-Up Memory Intensive Applications through Adaptive Hardware Accelerators.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

2011
A runtime adaptive controller for supporting hardware components with variable latency.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011


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