Vishwanadh Tirumalashetty

According to our database, Vishwanadh Tirumalashetty authored at least 2 papers between 2007 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Ultra Low-Power Clocking Scheme Using Energy Recovery and Clock Gating.

Hamid Mahmoodi, Vishy Tirumalashetty, Matthew Cooke, Kaushik Roy

IEEE Trans. Very Large Scale Integr. Syst., 2009

2007

Clock Gating and Negative Edge Triggering for Energy Recovery Clock.

Vishwanadh Tirumalashetty, Hamid Mahmoodi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007